參數(shù)資料
型號: ML60851DTB
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP44
封裝: 10 X 10 MM, 0.80 MM PITCH, PLASTIC, TQFP-44
文件頁數(shù): 14/84頁
文件大?。?/td> 394K
代理商: ML60851DTB
FEDL60851D-01
1Semiconductor
ML60851D
20/83
End Point 2 Receive Byte Count Register (EP2RXCNT)
Read address
CBh
Write address
D7
D6
D5
D4
D3
D2
D1
D0
After a hardware reset
000
0000
0
After a bus reset
000
0000
0
Definition
0
Byte Count of EP2 (R)
The ML60851D automatically counts the number of bytes in the packet being received by EP2 and stores it in this
register. Although the counting is performed up to the maximum packet size entered in the payload register in the
case of a full packet, the count will be less than this value in the case of a short packet. The local MCU refers to
this value and reads the data of one packet from the EP2RXFIFO.
This register is invalid when the EP2 transfer direction is set as ‘Transmit’.
The EP2 receive byte count register is cleared under the following conditions:
1. When an OUT token is received for EP2.
2. When the EP2 receive packet ready bit is reset (by writing a “1” in PKTRDY(2)).
3. When the local MCU writes a “0” in the stall bit (EP2CON(1)).
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