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參數(shù)資料
| 型號： | M58MR064D120ZC6T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64 Mbit 4Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
| 中文描述： | 64兆位4Mb的x16插槽，復(fù)用的I / O，雙行，突發(fā)1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 50/52頁 |
| 文件大?。?/td> | 399K |
| 代理商： | M58MR064D120ZC6T |
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M58MR064C, M58MR064D
Table 4. User Bus Operations (1)
Note: 1. X = Don't care.
Table 5. Read Electronic Signature (AS and Read CFI instructions) (1)
Note: 1. Addresses are latched on the rising edge of L input.
2. EA means Electronic Signature Address (see Read Electronic Signature)
3. Value during address latch.
Table 6. Read Block Protection (AS and Read CFI instructions) (1)
Note: 1. Addresses are latched on the rising edge of L input.
2. A lockedblock canbeunprotected only withWP at VIH.
3. Value during address latch.
4. BA means Block Address. First cycle command address should indicate the bank of the block address.
Operation
E
G
W
L
RP
WP
ADQ15-ADQ0
Address Latch
VIL
VIH
VIL
(rising edge)
VIH
Address Input
Write
VIL
VIH
VIL
VIH
Data Input
Output Disable
VIL
VIH
Hi-Z
Standby
VIH
XX
X
VIH
X
Hi-Z
Reset / Power-down
X
VIL
X
Hi-Z
Block Locking
VIL
XX
X
VIH
VIL
X
Code
Device
E
G
W
ADQ1 (3)
ADQ0 (3)
Other
Address (2)
ADQ15-0
Manufacturer Code
VIL
VIH
VIL
EA (2)
0020h
Device Code
M58MR064C
VIL
VIH
VIL
VIH
EA (2)
88DCh
M58MR064D
VIL
VIH
VIL
VIH
EA (2)
88DDh
Block Status
E
G
W
ADQ1 (3)
ADQ0 (3)
Other
Address
ADQ15-0
Protected and unlocked
VIL
VIH
VIL
BA (4)
0001
Unprotected and unlocked
VIL
VIH
VIL
BA (4)
0000
Protected and locked
VIL
VIH
VIL
BA (4)
0003
Unprotected and locked (2)
VIL
VIH
VIL
BA (4)
0002
DEVICE OPERATIONS
The following operations can be performed using
the appropriate bus cycles: Address Latch, Read
Array (Random, and Page Modes), Write com-
mand, Output Disable, Standby, reset/Power-
down and Block Locking. See Table 4.
Address Latch. In asynchronous operation, the
address is latched on the rising edge of L input. In
burst mode the address is latched either on the ris-
ing edge of L or on the first rising/falling edge of K
(depending on configuration settings) when L is
low.
Read. Read operations are used to output the
contents of the Memory Array, the Electronic Sig-
nature, the Status Register, the CFI, the Block
Protection Status, the Read Configuration Regis-
ter status and the Protection Register.
Read operation of the Memory Array may be per-
formed in asynchronous page mode or synchro-
nous burst mode. In asynchronous page mode
data is internally read and stored in a page buffer.
The page has a size of 4 words and is addressed
by ADQ0 and ADQ1 address inputs.
According to the device configuration the following
Read operations: Electronic Signature - Status
Register - CFI - Block Protection Status - Read
Configuration Register Status - Protection Regis-
ter must be accessed as asynchronous read or as
single synchronous read (see Figure 4).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| M58MR064DZC | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58MR064-ZCT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58PR001LE | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:512-Mbit or 1-Gbit (】 16, multiple bank, multilevel, burst) 1.8 V supply Flash memories |
| M58PR001LE96ZAC5 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:512-Mbit or 1-Gbit (】 16, multiple bank, multilevel, burst) 1.8 V supply Flash memories |
| M58PR001LE96ZAD5 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:512-Mbit or 1-Gbit (】 16, multiple bank, multilevel, burst) 1.8 V supply Flash memories |
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