參數(shù)資料
型號(hào)： M37902FGCGP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機(jī)
文件頁數(shù)： 59/143頁
文件大?。?/td> 1463K
代理商： M37902FGCGP
59
M37902FCCHP, M37902FGCHP, M37902FJCHP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(4) Pulse width modulation mode [11]
Figure 55 shows the bit configuration of the timer Ai mode register
during pulse width modulation mode. In pulse width modulation
mode, bits 0, 1, and 2 must be set to
“
1
”
.
Bit 5 is used to determine whether to perform 16-bit length pulse
width modulator or 8-bit length pulse width modulator. 16-bit length
pulse width modulator is selected when bit 5 is
“
0
”
and 8-bit length
pulse width modulator is selected when it is
“
1
”
. The 16-bit length
pulse width modulator is described first.
The pulse width modulator can be started with a software trigger or
with an input signal from a TAi
IN
pin (external trigger).
The software trigger mode is selected when bit 4 is
“
0
”
.
Pulse width modulator is started and a pulse is output from TAi
OUT
when the count start bit is set to
“
1
”
.
The external trigger mode is selected when bit 4 is
“
1
”
.
Pulse width modulation starts when a trigger signal is input from the
TAi
IN
pin when the count start bit is
“
1
”
. Whether to trigger at the fall
or rise of the trigger signal is determined by bit 3. The trigger is at the
fall of the trigger signal when bit 3 is
“
0
”
and at the rise when it is
“
1
”
.
When data is written to timer Ai with the pulse width modulator
halted, it is written to the reload register and the counter.
Then when the count start bit is set to
“
1
”
and a software trigger or
an external trigger is issued to start modulation, the waveform shown
in Figure 56 is output continuously.
Once modulation is started, triggers are not accepted. If the value in
the reload register is m, the duration
“
H
”
of pulse is
×
m
and the output pulse period is
×
(2
16
–
1).
An interrupt request signal is generated and the interrupt request bit
in the timer Ai interrupt control register is set at each fall of the output
pulse.
The width of the output pulse is changed by updating timer data. The
update can be performed at any time. The output pulse width is
changed at the rise of the pulse after data is written to the timer.
The contents of the reload register are transferred to the counter just
before the rise of the next pulse so that the pulse width is changed
from the next output pulse.
Undefined data is read when timer Ai is read.
The 8-bit length pulse width modulator is described next.
The 8-bit length pulse width modulator is selected when the timer Ai
mode register bit 5 is
“
1
”
.
The reload register and the counter are both divided into 8-bit
halves.
1
selected clock frequency
1
selected clock frequency
The low-order 8 bits function as a prescaler and the high-order 8 bits
function as the 8-bit length pulse width modulator. The prescaler
counts the clock selected by bits 6, 7, and the contents of the timer A
clock division select register. (See Table 12.) A pulse is generated
when the counter reaches 0000
16
as shown in Figure 57. At the
same time, the contents of the reload register is transferred to the
counter and count is continued.
Fig. 55 Bit configuration of timer Ai mode register during pulse width
modulation mode
7 6 5 4 3 2 1 0
1
1
1
1 1 : Always
“
11
”
in pulse width modulation
mode
1 : Always
“
1
”
in pulse width modulation
mode
0
×
: Software trigger
1 0 : Trigger at the falling of TAi
IN
input
1 1 : Trigger at the rising of TAi
IN
input
0 : 16-bit pulse width modulator
1 : 8-bit pulse width modulator
Clock source select bits
(See Table 12.)
Timer A0 mode register
Timer A1 mode register
Timer A2 mode register
Timer A3 mode register
Timer A4 mode register
Addresses
56
16
57
16
58
16
59
16
5A
16
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