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M37902FCCHP, M37902FGCHP, M37902FJCHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PROCESSOR MODES
Any of the three processor modes (single-chip mode, memory ex-
pansion mode, microprocessor mode) can be selected with the fol-
lowing:
Processor mode bits of the processor mode register 0 (bits 1 and 0
at address 5E
16
; Figure 24)
Voltage level applied to pin MD0
Table 3 lists the selection method of a processor mode.
The memory map which the CPU can access depends on the se-
lected processor mode. Figure 23 shows the memory maps in three
processor modes.
Also, the functions of ports P0 to P4, P10, P11 depend on the se-
lected processor mode. For details, see Tables 5 and 6.
Figures 24 to 26 show the bit configurations of the processor mode
registers 0, 1, and port function control register.
In the single-chip mode, ports P0 to P4, P10, P11 function as I/O
ports. (While the internal peripheral devices are used, these ports
function as these devices’ I/O pins.) In this mode, only the internal
area (SFRs, internal RAM, internal ROM) is accessible.
In the memory expansion and microprocessor modes, external de-
vices assigned in the external memory area can be connected via
buses. Therefore, ports P0 to P4, P10, P11 function as I/O pins for
the address bus, data bus, bus control signals. (Some port functions
are selectable.) Table 4 lists each bus control signal’s function.
In the memory expansion mode, all of the internal area (SFRs, inter-
nal RAM, internal ROM) and external area are accessible. In the mi-
croprocessor mode, the internal area except for the internal ROM (in
other words, SFRs and internal RAM) and the external area are ac-
cessible.
Note that, when the external devices are located to an area where
the internal area and external area overlap, only the internal area
can be read/written; the external area cannot be read/written.
Single-chip mode
SFR area
Unused area
Unused area
Internal RAM
area
Internal ROM
area
Memory expansion mode
SFR area
Internal RAM
area
Internal ROM
area
Reserved area
(Note)
Microprocessor mode
SFR area
Internal RAM
area
Reserved area
(Note)
0
16
FF
16
FEFFFF
16
FF0000
16
FFFFFF
16
External area : Access to this area enables the access to the devices which
are connected with the external.
Note:
Do not access this area (bank FF
16
).
SFR area : Internal peripheral devices
’
control registers are allocated here.
Fig. 23 Memory maps in three processor modes