參數(shù)資料
型號: M37754S4CGP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16BIT CMOS MICROCOMPUTER
中文描述: 單芯片16位微機的CMOS
文件頁數(shù): 91/114頁
文件大?。?/td> 1116K
代理商: M37754S4CGP
91
PRELIMINARY
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Switching characteristics
(V
CC
= 5 V±10 %, V
SS
= 0 V, T
a
= –20 to 85 °C, f(X
IN
) = 25 MHz when the clock source select bit = “0”
,
unless otherwise noted)
Memory expansion and Microprocessor mode : Low-speed running
Symbol
Parameter
Unit
t
w(
φ
H)
, t
w(
φ
L)
t
d(
φ
1–WR)
t
d(
φ
1–RD)
t
w(WR)
t
w(RD)
t
d(A–WR)
t
d(A–RD)
t
d(A–ALE)
t
d(BHE–WR)
t
d(BHE–RD)
t
d(BHE–ALE)
t
d(CS–WR)
t
d(CS–RD)
t
d(CS–ALE)
t
d(WR–DLQ/DHQ)
t
pxz(WR–DLZ/DHZ)
t
d(ALE–WR)
t
d(ALE–RD)
t
w(ALE)
t
h(WR–A)
t
h(RD–A)
t
h(WR–BHE)
t
h(RD–BHE)
t
h(WR–CS)
t
h(RD–CS)
t
h(WR–DLQ/DHQ)
t
pzx(WR–DLZ/DHZ)
t
d(LA–WR)
t
d(LA–RD)
t
d(LA–ALE)
t
h(ALE–LA)
t
pxz(RD–DLZ)
t
pzx(RD–DLZ)
t
d(WR–PiQ)
: f(X
IN
) = 12.5 MHz when the clock source selet bit = “1”
Note:
Since the values depend on external clock input frequency f(X
IN
), calculate them using the bus timing data formula on the next page.
φ
φ
low-level pulse width
(Note)
(Note)
RD low-level pulse width
(Note)
Address output delay time
(Note)
Address output delay time
(Note)
(Note)
(Note)
(Note)
____
(Note)
Chip select output delay time
(Note)
Chip select output delay time
(Note)
Chip select output delay time
(Note)
Data output delay time
Floating start delay time
(Note)
ALE output delay time
ALE output delay time
ALE pulse width
(Note)
Address hold time
(Note)
Address hold time
(Note)
BHE hold time
(Note)
BHE hold time
(Note)
Chip select hold time
(Note)
Chip select hold time
(Note)
Data hold time
(Note)
Floating release delay time
Address output delay time
(Note)
Address output delay time
(Note)
Address output delay time
(Note)
Address hold time
Floating start delay time
Floating release delay time
(Note)
Port Pi data output delay time (i = 4—9, 11)
___
__
___
____
____
Min.
20
–7
–7
60
60
15
15
8
15
15
8
15
15
8
4
4
22
10
10
10
10
10
10
15
0
12
12
5
9
18
2-
φ
access
Max.
12
12
35
30
5
60
3-
φ
access
Min.
20
–7
–7
140
140
15
15
8
15
15
8
15
15
8
4
4
22
10
10
10
10
10
10
15
0
12
12
5
9
18
Max.
12
12
35
30
5
60
Min.
20
–7
–7
140
140
95
95
55
95
95
55
95
95
55
4
4
62
10
10
10
10
10
10
15
0
92
92
52
25
(Note)
18
4-
φ
access
Max.
12
12
35
30
5
60
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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