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參數(shù)資料
| 型號： | M37754S4CGP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片16位微機的CMOS |
| 文件頁數(shù)： | 63/114頁 |
| 文件大?。?/td> | 1116K |
| 代理商： | M37754S4CGP |
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63
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fig. 76 Microcomputer internal registers status after reset
(04
16
)···
Address
Port P0 direction register
0
0 0 0 0
00
16
(05
16
)···
Port P1 direction register
(08
16
)···
Port P2 direction register
0 0 0 0
(09
16
)···
Port P3 direction register
0
0
0
0 0 0
(15
16
)···
Port P9 direction register
00
16
(0C
16
)···
Port P4 direction register
00
16
(0D
16
)···
Port P5 direction register
00
16
(10
16
)···
Port P6 direction register
00
16
(11
16
)···
Port P7 direction register
00
16
(14
16
)···
Port P8 direction register
00
16
(56
16
)···
Timer A0 mode register
00
16
(57
16
)···
Timer A1 mode register
00
16
(58
16
)···
Timer A2 mode register
00
16
(59
16
)···
Timer A3 mode register
00
16
(5A
16
)···
Timer A4 mode register
00
16
(18
16
)···
Port P10 direction register
00
16
(19
16
)···
Port P11 direction register
00
16
0
0 0
0
0 0 0
(1D
16
)···
Pulse output data register 0
0
0 0 0
0
(1E
16
)···
A-D control register 0
0
0 0 0
0
0 1 1
(1F
16
)···
A-D control register 1
1
0
0
0 0 0
(34
16
)···
UART 0 Transmit/Receive control register 0
1
0
0
0 0 0
(3C
16
)···
UART 1 Transmit/Receive control register 0
0
0 0 0
0
0 1 0
(35
16
)···
UART 0 Transmit/Receive control register 1
0
0 0 0
0
0 1 0
(3D
16
)···
UART 1 Transmit/Receive control register 1
0
0
0 0 0
(42
16
)···
One-shot start register
0 0 0
(45
16
)···
Timer A write register
(1A
16
)···
Waveform output mode register
00
16
(1C
16
)···
Pulse output data register 1
00
16
(30
16
)···
UART 0 Transmit/Receive mode register
00
16
(38
16
)···
UART 1 Transmit/Receive mode register
00
16
0
0 0 0
0
0 0 0
(44
16
)···
Up-down register
(40
16
)···
Count start register
00
16
0
0 1
0
0 0 0
(5B
16
)···
Timer B0 mode register
0
0 1
0
0 0 0
(5C
16
)···
Timer B1 mode register
0
0 1
0
0 0 0
(5D
16
)···
Timer B2 mode register
0
0 0 0
0
0 0 0
(5E
16
)···
Processor mode register 0
(5F
16
)···
Processor mode register 1
00
16
(60
16
)···
Address
Watchdog timer
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0
FFF
16
(61
16
)···
Watchdog timer frequency select register
(62
16
)···
Chip select control register
0 0 0
(63
16
)···
Chip select area register
(6D
16
)···
Particular function select register 1
(64
16
)···
Comparator function select register
(66
16
)···
Comparator result register
(68
16
)···
D-A register 0
(6A
16
)···
D-A register 1
(6C
16
)···
Particular function select register 0
INT
2
interrupt control register
Processor status register PS
00
16
00
16
Program bank register PG
Contents of FFFF
16
Program counter PC
H
Contents of FFFE
16
Program counter PC
L
0000
16
(6E
16
)···
INT
4
interrupt control register
(6F
16
)···
INT
3
interrupt control register
0
0 0
0 0 0
0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
(72
16
)···
UART 0 receive interrupt control register
(73
16
)···
UART 1 transmit interrupt control register
(74
16
)···
UART 1 receive interrupt control register
(77
16
)···
Timer A2 interrupt control register
(78
16
)···
Timer A3 interrupt control register
(79
16
)···
Timer A4 interrupt control register
(7A
16
)···
Timer B0 interrupt control register
0
0 0
0 0 0
(7C
16
)···
Timer B2 interrupt control register
0 0 0
(7E
16
)···
INT
1
interrupt control register
(70
16
)···
A-D interrupt control register
(71
16
)···
UART 0 transmit interrupt control register
(75
16
)···
Timer A0 interrupt control register
(76
16
)···
Timer A1 interrupt control register
0
0 0
0 0 0
(7D
16
)···
INT
0
interrupt control register
(7B
16
)···
Timer B1 interrupt control register
Direct page register DPR
0 0 0
(7F
16
)···
0
0 0
1
0
0 0
0
0 0
Data bank register DT
Contents of other registers and RAM are not initiallzed and must be in-
itiallzed by software.
Note :
Bit 0 of chip select control register (address 62
16)
becomes “0” when CNVss pin level is “L”; that bit becomes “1” when the pin level is “H”.
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