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參數(shù)資料
| 型號： | M37754S4CGP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片16位微機的CMOS |
| 文件頁數(shù)： | 27/114頁 |
| 文件大?。?/td> | 1116K |
| 代理商： | M37754S4CGP |
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27
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(2) Event counter mode [01]
Figure 23 shows the bit configuration of the timer Ai mode register
during event counter mode. In event counter mode, bit 0 of the timer
Ai mode register must be “1” and bits 1 and 5 must be “0”.
The input signal from the TAi
IN
pin is counted when the count start bit
shown in Figure 19 is “1” and counting is stopped when it is “0”.
Count is performed at the fall of the input signal when bit 3 is “0” and
at the rise of the signal when it is “1”.
In event counter mode, whether to increment or decrement the count
can be selected with the up-down bit or the input signal from the
TAi
OUT
pin.
When bit 4 of the timer Ai mode register is “0”, the up-down bit is used
to determine whether to increment or decrement the count (decre-
ment when the bit is “0” and increment when it is “1”). Figure 24
shows the bit configuration of the up-down register.
When bit 4 of the timer Ai mode register is “1”, the input signal from
the TAi
OUT
pin is used to determine whether to increment or decre-
ment the count. However, note that bit 2 must be “0” if bit 4 is “1.” It is
because if bit 2 is “1”, TAi
OUT
pin becomes an output pin to output
pulses.
The count is decremented when the input signal from the TAi
OUT
pin
is “L” and incremented when it is “H”. Determine the level of the input
signal from the TAi
OUT
pin before a valid edge is input to the TAi
IN
pin.
An interrupt request signal is generated and the interrupt request bit
in the timer Ai interrupt control register is set when the counter
reaches 0000
16
(decrement count) or FFFF
16
(increment count). At
the same time, the contents of the reload register is transferred to the
counter and the count is continued.
When bit 2 is “1,” each time the counter reaches 0000
16
(decrement
count) or FFFF
16
(increment count), the waveform’s polarity is re-
versed and is output from TAi
OUT
pin.
If bit 2 is “0”, TAi
OUT
pin can be used as a normal port pin.
However, if bit 4 is “1” and the TAi
OUT
pin is used as an output pin,
the output from the pin changes the count direction. Therefore, bit 4
must be “0” unless the output from the TAi
OUT
pin is to be used to se-
lect the count direction.
Fig. 23
Timer Ai mode register bit configuration during event
counter mode
Fig. 24 Up-down register bit configuration
7 6 5 4 3 2 1 0
0
×
×
1
0
0 1 : Always “01” in event counter mode
0 : No pulse output
1 : Pulse output
0 : Count at the falling edge of input signal
1 : Count at the rising edge of input signal
0 : Increment or decrement according
to up/down flag
1 : Increment or decrement according
to TAi
OUT
pin input signal level
0 : Always “0” in event counter mode
×
×
: Not used in event counter mode
Timer A0 mode register
Timer A1 mode register
Timer A2 mode register
Timer A3 mode register
Timer A4 mode register
Addresses
56
16
57
16
58
16
59
16
5A
16
Timer A0 up-down bit
Timer A1 up-down bit
Timer A2 up-down bit
Timer A3 up-down bit
Timer A4 up-down bit
Timer A2 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Timer A3 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Timer A4 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Up-down register
7 6 5 4 3 2 1 0
Address
44
16
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