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參數(shù)資料
| 型號(hào)： | M37754S4CGP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片16位微機(jī)的CMOS |
| 文件頁(yè)數(shù)： | 38/114頁(yè) |
| 文件大小： | 1116K |
| 代理商： | M37754S4CGP |
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38
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
When writing data to the dead-time timer (address 1B
16
), the data is
written to the reload register shared by three dead-time timers.
When the dead-time timers catch the start trigger from the respec-
tive timers, the reload register contents are transferred to its counter
and the dead-time timer decrements with the clock source selected
by bits 6 and 7 of pulse output data register (address 1C
16
). Addition-
ally, this timer can accept another trigger before completion of the
preceding trigger operation. In this case, after transferring the reload
register contents to the dead-time timer at acceptance of the trigger,
the value is decremented.
The dead-time timer operates as a one-shot timer. Accordingly, this
timer starts pulse output when the trigger is caught, and finishes
pulse output and stops operation when its contents become “00
16
”,
and waits next trigger.
Pulse output data register 1 1C
16
V-phase output polarity set buffer
(Three-phase mode 0)
0 : “H” output
1 : “L” output
Interrupt request interval set bit
(Three-phase mode 1)
0 : At every second time
1 : At every fourth time
U-phase output polarity set buffer
(Three-phase mode 0)
0 : “H” output
1 : “L” output
Interrupt validity output select bit
(Three-phase mode 1)
0 : Timer B2 interrupt request generated at each
even-numbered underflow of timer B2.
1 : Timer B2 interrupt request generated at each
odd-numbered underflow of timer B2.
: Not used in three-phase waveform mode
“H” output of W-phase fix buffer
0 : Released from fixed output
1 : “H” output fixed
“H” output of V-phase fix buffer
0 : Released from fixed output
1 : “H” output fixed
“H” output of U-phase fix buffer
0 : Released from fixed output
1 : “H” output fixed
Clock-source-of-dead-time timer select bits
00 : Pf
2
selected
01 : Pf
4
selected
10 : Pf
8
selected
11 : Do not select.
7
6
5
4
3
2
×
1
0
Address
Pulse output data register 0 1D
16
: Not used in three-phase waveform mode
(Valid in three-phase mode 0)
W-phase output polarity set buffer
0 : “H” output
1 : “L” output
“H” output of W-phase fix buffer
0 : Released from fixed output
1 : “H” output fixed
“H” output of V-phase fix buffer
0 : Released from fixed output
1 : “H” output fixed
“H” output of U-phase fix buffer
0 : Released from fixed output
1 : “H” output fixed
7
6
5
4
3
2
×
1
×
0
×
Address
Note :
Only when bit 5 of the particular function select register 1 (in Fig. 15)
is set to “1”, these registers’ contents can be changed from the status
during reset (in Fig.76).
Fig. 44 Bit configuration of pulse output data registers 1 and 0 in three-phase waveform mode
In the three-phase waveform mode, setting bit 7 of the waveform out-
put mode register (address 1A
16
) to “1” makes positive waveforms
(U, V, W phases) and their negative waveforms (U, V, W phases)
output from the respective ports. When that bit is “0”, their ports are
floating. That bit is cleared to “0” by inputting falling edge to the INT
0
pin or reset other than clearing by an instruction..
Additionally, setting bits 5 to 3 of the pulse output data register 1 (ad-
dress 1C
16
) to “1” makes the corresponding positive waveforms
fixed to “H”, and setting bits 7 to 5 of the pulse output data register 0
(address 1D
16
) to “1” makes the corresponding negative waveforms
fixed to “H”.
When selecting the three-phase waveform mode, INT
0
pin become
input-only pin.
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