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L29S800F
PRELIMINARY
A
8MEGABIT (1M×8 /512K×16)
3 VOLT CMOS FLASH MEMERY
LinkSmart
15
071802
Table 7 L29S800F/-B Standard Command Definitions
First Bus
Write Cycle
Second Bus
Write Cycle
Third Bus
Write Cycle
Fourth Bus
Read/Write
Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Command
Sequence
Bus
Write
Cycles
Req’d
Addr. Data
Addr. Data
Addr. Data
Addr. Data
Addr. Data
Addr. Data
Word
Byte
Word
Read/Reset
1
XXXH F0H
—
—
—
—
—
—
—
—
—
—
555H
AAAH AAH
555H
AAAH AAH
555H
AAAH AAH
555H
AAAH AAH
555H
AAAH AAH
2AAH
555H
2AAH
555H
2AAH
555H
2AAH
555H
2AAH
555H
555H
AAAH
555H
AAAH
555H
AAAH
555H
AAAH
555H
AAAH
Read/Reset
Byte
3
55H
F0H
RA
RD
—
—
—
—
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Autoselect
3
55H
90H
—
—
—
—
—
—
Program
4
55H
A0H
PA
PD
—
—
—
—
555H
AAAH
555H
AAAH
2AAH
555H
2AAH
555H
555H
AAAH
Chip Erase
6
55H
80H
AAH
55H
10H
Sector
Erase
6
55H
80H
AAH
55H
SA
30H
Sector Erase Suspend Erase can be suspended during sector erase with Addr. (“H” or “L”). Data (B0H)
Sector Erase Resume Erase can be resumed after suspend with Addr. (“H” or “L”). Data (30H)
Notes:
1. Address bits A
11
to A
18
= X = “H” or “L” for all address commands except or Program Address (PA)
and sector Address (SA)
2. Bus operations are defined in Tables 2 and 3.
3. RA = Address of the memory location to be read
PA = Address of the memory location to be programmed
Addresses are latched on the falling edge of the
WE
pulse.
SA = Address of the sector to be erased. The combination of A
18
, A
17
, A
16
, A
15
, A
14
, A
13
, and A
12
will uniquely select any sector.
4. RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the falling edge of
WE
.
5. The system should generate the following address patterns:
Word Mode: 555H or 2AAH to addresses A
0
to A
10
Byte Mode: AAAH or 555H to addresses A
–1
and A
0
to A
10
6. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.