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參數(shù)資料
| 型號(hào)： | L29S800F |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8MEGABIT (1M】8 /512K】16) 3 VOLT CMOS FLASH MEMERY |
| 中文描述： | 8MEGABIT（100萬】8 / 16】為512k）3伏的CMOS閃存MEMERY |
| 文件頁數(shù)： | 12/54頁 |
| 文件大?。?/td> | 797K |
| 代理商： | L29S800F |
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L29S800F
PRELIMINARY
A
8MEGABIT (1M×8 /512K×16)
3 VOLT CMOS FLASH MEMERY
LinkSmart
12
071802
the sector addresses. Once the 12 V is taken away from the
RESET
pin, all the previously protected
sectors will be protected again. See Figures 17 and 25.
RESET
Hardware Reset
The L29S800F/-B devices may be reset by driving the
RESET
pin to V
IL
. The
RESET
pin has a
pulse requirement and has to be kept low (V
IL
) for at least 500 ns in order to properly reset the internal
state machine. Any operation in the process of being executed will be terminated and the internal state
machine will be reset to the read mode 20
μ
s after the
RESET
pin is driven low. Furthermore, once
the
RESET
pin goes high, the devices require an additional t
RH
before it will allow read access. When
the
RESET
pin is low, the devices will be in the standby mode for the duration of the pulse and all the
data output pins will be tri-stated. If a hardware reset occurs during a program or erase operation, the
data at that particular location will be corrupted. Please note that the RY/
BY
output signal should be
ignored during the
RESET
pulse. See Figure 12 for the timing diagram. Refer to Temporary Sector
Unprotection for additional functionality.
If hardware reset occurs during Embedded Erase Algorithm, there is a possibility that the erasing
sector(s) cannot be used.
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