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參數(shù)資料
| 型號： | KSZ8862-16MQL-FX |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 82/125頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH ETH 2P 16BIT 128PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 系列： | KSZ8862 |
| 控制器類型： | 以太網(wǎng)開關(guān)控制器 |
| 接口： | PCI |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 1081 (CN2011-ZH PDF) |
| 配用： | 576-1638-ND - BOARD EVALUATION KSZ8862-10FL 576-1637-ND - BOARD EVALUATION KSZ8862-100FX |
| 其它名稱： | 576-3271 |
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Micrel, Inc.
KSZ8862-16/32MQL
April 2007
6
M9999-040407-3.0
Bank 3 Memory BIST INFO Register (0x04): MBIR .......................................................................................................60
Bank 3 Global Reset Register (0x06): GRR ...................................................................................................................60
Bank 3 Bus Configuration Register (0x08): BCFG .........................................................................................................61
Banks 4 – 15: Reserved .................................................................................................................................................61
Bank 16 Transmit Control Register (0x00): TXCR .........................................................................................................61
Bank 16 Transmit Status Register (0x02): TXSR ...........................................................................................................61
Bank 16 Receive Control Register (0x04): RXCR ..........................................................................................................62
Bank 16 TXQ Memory Information Register (0x08): TXMIR ..........................................................................................62
Bank 16 RXQ Memory Information Register (0x0A): RXMIR.........................................................................................63
Bank 17 TXQ Command Register (0x00): TXQCR ........................................................................................................63
Bank 17 RXQ Command Register (0x02): RXQCR .......................................................................................................63
Bank 17 TX Frame Data Pointer Register (0x04): TXFDPR ..........................................................................................63
Bank 17 RX Frame Data Pointer Register (0x06): RXFDPR .........................................................................................64
Bank 17 QMU Data Register Low (0x08): QDRL ...........................................................................................................64
Bank 17 QMU Data Register High (0x0A): QDRH .........................................................................................................64
Bank 18 Interrupt Enable Register (0x00): IER ..............................................................................................................65
Bank 18 Interrupt Status Register (0x02): ISR ...............................................................................................................66
Bank 18 Receive Status Register (0x04): RXSR............................................................................................................67
Bank 18 Receive Byte Counter Register (0x06): RXBC.................................................................................................67
Bank 19 Multicast Table Register 0 (0x00): MTR0.........................................................................................................68
Bank 19 Multicast Table Register 1 (0x02): MTR1.........................................................................................................68
Bank 19 Multicast Table Register 2 (0x04): MTR2.........................................................................................................68
Bank 19 Multicast Table Register 3 (0x06): MTR3.........................................................................................................68
Banks 20 – 31: Reserved ...............................................................................................................................................68
Bank 32 Switch ID and Enable Register (0x00): SIDER ................................................................................................69
Bank 32 Switch Global Control Register 1 (0x02): SGCR1............................................................................................69
Bank 32 Switch Global Control Register 2 (0x04): SGCR2............................................................................................70
Bank 32 Switch Global Control Register 3 (0x06): SGCR3............................................................................................71
Bank 32 Switch Global Control Register 4 (0x08): SGCR4............................................................................................71
Bank 32 Switch Global Control Register 5 (0x0A): SGCR5 ...........................................................................................72
Bank 33 Switch Global Control Register 6 (0x00): SGCR6............................................................................................73
Bank 33 Switch Global Control Register 7 (0x02): SGCR7............................................................................................73
Banks 34 – 38: Reserved ...............................................................................................................................................73
Bank 39 MAC Address Register 1 (0x00): MACAR1 .....................................................................................................74
Bank 39 MAC Address Register 2 (0x02): MACAR2 .....................................................................................................74
Bank 39 MAC Address Register 3 (0x04): MACAR3 .....................................................................................................74
Bank 40 TOS Priority Control Register 1 (0x00): TOSR1 ..............................................................................................74
Bank 40 TOS Priority Control Register 2 (0x02): TOSR2 ..............................................................................................75
Bank 40 TOS Priority Control Register 3 (0x04): TOSR3 ..............................................................................................75
Bank 40 TOS Priority Control Register 4 (0x06): TOSR4 ..............................................................................................76
Bank 40 TOS Priority Control Register 5 (0x08): TOSR5 ..............................................................................................76
Bank 40 TOS Priority Control Register 6 (0x0A): TOSR6 ..............................................................................................77
Bank 41 TOS Priority Control Register 7 (0x00): TOSR7 ..............................................................................................77
Bank 41 TOS Priority Control Register 8 (0x02): TOSR8 ..............................................................................................78
Bank 42 Indirect Access Control Register (0x00): IACR ................................................................................................78
Bank 42 Indirect Access Data Register 1 (0x02): IADR1 ...............................................................................................79
Bank 42 Indirect Access Data Register 2 (0x04): IADR2 ...............................................................................................79
Bank 42 Indirect Access Data Register 3 (0x06): IADR3 ...............................................................................................79
Bank 42 Indirect Access Data Register 4 (0x08): IADR4 ...............................................................................................79
Bank 42 Indirect Access Data Register 5 (0x0A): IADR5...............................................................................................79
Bank 43: Reserved .........................................................................................................................................................79
Bank 44 Digital Testing Status Register (0x00): DTSR ..................................................................................................80
Bank 44 Analog Testing Status Register (0x02): ATSR .................................................................................................80
Bank 44 Digital Testing Control Register (0x04): DTCR ................................................................................................80
Bank 44 Analog Testing Control Register 0 (0x06): ATCR0 ..........................................................................................80
Bank 44 Analog Testing Control Register 1 (0x08): ATCR1 ..........................................................................................80
Bank 44 Analog Testing Control Register 2 (0x0A): ATCR2..........................................................................................80
Bank 45 PHY 1 MII-Register Basic Control Register (0x00): P1MBCR .........................................................................80
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