參數(shù)資料
型號: KSZ8862-16MQL-FX
廠商: Micrel Inc
文件頁數(shù): 2/125頁
文件大?。?/td> 0K
描述: IC SWITCH ETH 2P 16BIT 128PQFP
標(biāo)準(zhǔn)包裝: 66
系列: KSZ8862
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: PCI
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
配用: 576-1638-ND - BOARD EVALUATION KSZ8862-10FL
576-1637-ND - BOARD EVALUATION KSZ8862-100FX
其它名稱: 576-3271
Micrel, Inc.
KSZ8862-16/32MQL
April 2007
10
M9999-040407-3.0
List of Tables
Table 1. MDI/MDI-X Pin Definitions ....................................................................................................................................................... 25
Table 2. Bus Interface Unit Signal Grouping ......................................................................................................................................... 35
Table 3. Transmit Queue Frame Format ............................................................................................................................................... 38
Table 4. Transmit Control Word Bit Fields............................................................................................................................................. 38
Table 5. Transmit Byte Count Format ................................................................................................................................................... 39
Table 6. Receive Queue Frame Format ................................................................................................................................................ 39
Table 7. FRXQ Packet Receive Status ................................................................................................................................................. 40
Table 8. FRXQ RX Byte Count Field ..................................................................................................................................................... 40
Table 9. Spanning Tree States.............................................................................................................................................................. 41
Table 10. FID+DA Lookup in VLAN Mode ............................................................................................................................................. 43
Table 11. FID+SA Lookup in VLAN Mode ............................................................................................................................................. 43
Table 12. EEPROM Format................................................................................................................................................................... 45
Table 13. ConfigParam Word in EEPROM Format ............................................................................................................................... 46
Table 14. Format of Per Port MIB Counters ......................................................................................................................................... 103
Table 15. Port 1 MIB Counters Indirect Memory Offset ........................................................................................................................ 104
Table 16. “All Ports Dropped Packet” MIB Counters Format ................................................................................................................ 104
Table 17. “All Ports Dropped Packet” MIB Counters Indirect Memory Offsets ..................................................................................... 104
Table 18. Static MAC Table Format (8 Entries)................................................................................................................................... 106
Table 19. Dynamic MAC Address Table Format (1024 Entries).......................................................................................................... 107
Table 20. VLAN Table Format (16 Entries) .......................................................................................................................................... 108
Table 21. Maximum Ratings................................................................................................................................................................ 109
Table 22. Operating Ratings................................................................................................................................................................ 109
Table 23. Electrical Characteristics ..................................................................................................................................................... 110
Table 24. Asynchronous Cycle (ADSN = 0) Timing Parameters ......................................................................................................... 111
Table 25. Asynchronous Cycle using ADSN Timing Parameters ........................................................................................................ 112
Table 26. Asynchronous Cycle using DATACSN Timing Parameters ................................................................................................. 113
Table 27. Address Latching Timing Parameters.................................................................................................................................. 114
Table 28. Synchronous Burst Write Timing Parameters...................................................................................................................... 115
Table 29. Synchronous Burst Read Timing Parameters ..................................................................................................................... 116
Table 30. Synchronous Write (VLBUSN = 0) Timing Parameters ....................................................................................................... 117
Table 31. Synchronous Read (VLBUSN = 0) Timing Parameters ....................................................................................................... 118
Table 32. EEPROM Timing Parameters.............................................................................................................................................. 119
Table 33. Auto Negotiation Timing Parameters................................................................................................................................... 120
Table 34. Reset Timing Parameters .................................................................................................................................................... 121
Table 35. Transformer Selection Criteria............................................................................................................................................. 122
Table 36. Qualified Single Port Magnetic ............................................................................................................................................ 122
Table 37. Typical Reference Crystal Characteristics ........................................................................................................................... 122
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