參數(shù)資料
型號: KSZ8862-16MQL-FX
廠商: Micrel Inc
文件頁數(shù): 59/125頁
文件大小: 0K
描述: IC SWITCH ETH 2P 16BIT 128PQFP
標(biāo)準(zhǔn)包裝: 66
系列: KSZ8862
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: PCI
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
配用: 576-1638-ND - BOARD EVALUATION KSZ8862-10FL
576-1637-ND - BOARD EVALUATION KSZ8862-100FX
其它名稱: 576-3271
Micrel, Inc.
KSZ8862-16/32MQL
April 2007
39
M9999-040407-3.0
The transmit Byte Count specifies the total number of bytes to be transmitted from the TXQ. Its format is given in Table 5.
Bit
Description
15-11
Reserved
10-0
TXBC Transmit Byte Count
Transmit Byte Count. Hardware uses the byte count information to conserve the TX buffer
memory for better utilization of the packet memory.
Note: The hardware behavior is unknown if an incorrect byte count information is written to
this field. Writing a 0 value to this field is not permitted.
Table 5. Transmit Byte Count Format
The data area contains six bytes of Destination Address (DA) followed by six bytes of Source Address (SA), followed by a
variable-length number of bytes. On transmit, all bytes are provided by the CPU, including the source address. The
KSZ8862M does not insert its own source address. The 802.3 Frame Length word (Frame Type in Ethernet) is not
interpreted by the KSZ8862M. It is treated transparently as data for transmit operations.
Receive Queue (RXQ) Frame Format
The frame format for the receive queue is shown in Table 6. The first word contains the status information for the frame
received. The second word is the total number of bytes of the RX frame. Following that is the packet data area. The
packet data area holds the frame itself. It may or may not include the CRC checksum depending on whether hardware
CRC stripping is enabled.
Packet Memory
Address Offset
Bit 15
Bit 0
2
nd Byte
1
st Byte
0
Status Word
2
Byte Count
4 - up
Packet Data
(maximum size is 1916)
Table 6. Receive Queue Frame Format
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