參數(shù)資料
型號(hào): KBE00F005A
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512Mb NAND*2 + 256Mb Mobile SDRAM*2
中文描述: 的512Mb的NAND * 2 256Mb的移動(dòng)SDRAM * 2
文件頁數(shù): 34/87頁
文件大?。?/td> 1353K
代理商: KBE00F005A
KBE00F005A-D411
MCP MEMORY
June 2005
34
Revision 1.0
Multi-Plane Page Program into Plane 0~3 or Plane 4~7
Multi-Plane Page Program is an extension of Page Program, which is executed for a single plane with 528 byte page registers. Since
the device is equipped with eight memory planes, activating the four sets of 528 byte page registers into plane 0~3 or plane 4~7
enables a simultaneous programming of four pages. Partial activation of four planes is also permitted.
After writing the first set of data up to 528 byte into the selected page register, Dummy Page Program command (11h) instead of
actual Page Program (10h) is inputted to finish data-loading of the current plane and move to the next plane. Since no programming
process is involved, R/B remains in Busy state for a short period of time(tDBSY). Read Status command (standard 70h or alternate
71h) may be issued to find out when the device returns to Ready state by polling the Ready/Busy status bit(I/O 6). Then the next set
of data for one of the other planes is inputted with the same command and address sequences. After inputting data for the last plane,
actual True Page Program (10h) instead of dummy Page Program command (11h) must be followed to start the programming pro-
cess. The operation of R/B and Read Status is the same as that of Page Program. Since maximum four pages into plane 0~3 or plane
4~7 are programmed simultaneously, pass/fail status is available for each page when the program operation completes. The
extended status bits (I/O1 through I/O 4) are checked by inputting the Read Multi-Plane Status Register. Status bit of I/O 0 is set to "1"
when any of the pages fails.
Multi-Plane page Program with "01h" pointer is not supported, thus prohibited.
Figure 12. Four-Plane Page Program
80h
11h
80h
11h
80h
11h
80h
10h
Data
input
Plane 0
(1024 Block)
Plane 1
(1024 Block)
Plane 2
(1024 Block)
Plane 3
(1024 Block)
Block 0
Block 4
Block 4092
Block 4088
Block 1
Block 5
Block 4093
Block 4089
Block 2
Block 6
Block 4094
Block 4090
Block 3
Block 7
Block 4095
Block 4091
80h
A
0
~ A
7
& A
9
~ A
26
528 Byte Data
I/O
0
~
7
R/B
Address &
Data Input
11h
80h
Address &
Data Input
A
0
~ A
7
& A
9
~ A
26
528 Byte Data
11h
80h
Address &
Data Input
A
0
~ A
7
& A
9
~ A
26
528 Byte Data
11h
80h
Address &
Data Input
A
0
~ A
7
& A
9
~ A
26
528 Byte Data
10h
t
DBSY
t
DBSY
t
DBSY
t
PROG
71h
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