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參數(shù)資料
| 型號： | KBE00F005A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Mb NAND*2 + 256Mb Mobile SDRAM*2 |
| 中文描述： | 的512Mb的NAND * 2 256Mb的移動SDRAM * 2 |
| 文件頁數(shù)： | 16/87頁 |
| 文件大?。?/td> | 1353K |
| 代理商： | KBE00F005A |
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KBE00F005A-D411
MCP MEMORY
June 2005
16
Revision 1.0
NAND Flash Technical Notes
Initial Invalid Block(s)
Initial invalid blocks are defined as blocks that contain one or more initial invalid bits whose reliability is not guaranteed by Samsung.
The information regarding the initial invalid block(s) is so called as the initial invalid block information. Devices with initial invalid
block(s) have the same quality level as devices with all valid blocks and have the same AC and DC characteristics. An initial invalid
block(s) does not affect the performance of valid block(s) because it is isolated from the bit line and the common source line by a
select transistor. The system design must be able to mask out the initial invalid block(s) via address mapping. The 1st block, which is
placed on 00h block address, is guaranteed to be a valid block, does not require Error Correction up to 1K program/erase cycles.
Identifying Initial Invalid Block(s)
All device locations are erased(FFh) except locations where the initial invalid block(s) information is written prior to shipping. The
initial invalid block(s) status is defined by the 6th byte in the spare area. Samsung makes sure that either the 1st or 2nd page of
every initial invalid block has non-FFh data at the column address of 517. Since the initial invalid block information is also erasable
in most cases, it is impossible to recover the information once it has been erased. Therefore, the system must be able to recognize
the initial invalid block(s) based on the initial invalid block information and create the initial invalid block table via the following sug-
gested flow chart(Figure 4). Any intentional erasure of the initial invalid block information is prohibited.
*
Check "FFh" at the column address 517
of the 1st and 2nd page in the block
Figure 4. Flow chart to create initial invalid block table.
Start
Set Block Address = 0
Check "FFh"
Increment Block Address
Last Block
End
No
Yes
Yes
Create (or update)
Initial Invalid Block(s) Table
No
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KBE00F005A-D411 | 512Mb NAND*2 + 256Mb Mobile SDRAM*2 |
| KBE00S003M | 1Gb NAND*2 + 256Mb Mobile SDRAM*2 |
| KBE00S003M-D411 | 1Gb NAND*2 + 256Mb Mobile SDRAM*2 |
| KBJ408G | 4.0A GLASS PASSIVATED BRIDGE RECTIFIER |
| KBJ4005G | 4.0A GLASS PASSIVATED BRIDGE RECTIFIER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KBE00F005A-D411 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb NAND*2 + 256Mb Mobile SDRAM*2 |
| KBE00G003M | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:NAND 512Mb*2 + Mobile SDRAM 256Mb*2 |
| KBE00G003M-D411 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:NAND 512Mb*2 + Mobile SDRAM 256Mb*2 |
| KBE00S003M | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Gb NAND*2 + 256Mb Mobile SDRAM*2 |
| KBE00S003M-D411 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Gb NAND*2 + 256Mb Mobile SDRAM*2 |
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