參數(shù)資料
型號: ISP1181BDGG
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus peripheral controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PDSO48
封裝: 6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48
文件頁數(shù): 5/70頁
文件大?。?/td> 341K
代理商: ISP1181BDGG
Philips Semiconductors
ISP1181B
Full-speed USB peripheral controller
Product data
Rev. 02 — 07 December 2004
5 of 70
9397 750 13958
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6.2 Pin description
Fig 3.
Pin configuration HVQFN48.
D
D
V
D
G
B
D
D
D
D
D
D
R
C
X
G
D
+
X
D
V
V
R
A
C
ISP1181BBS
004aaa136
DATA4
DATA3
DATA2
DATA5
DATA1
GND
VCC(3.3)
AD0
A0
RD
WR
DATA6
INT
DACK
DREQ
EOT
WAKEUP
BUS_CONF0
TEST3
TEST2
TEST1
SUSPEND
GL
VBUS
Bottom view
2
1
3
4
5
6
9
8
7
2
1
1
2
2
2
2
1
1
1
1
1
3
4
3
3
4
4
4
4
4
4
4
4
11
10
12
36
34
35
31
32
33
30
29
27
28
25
26
Table 2:
Symbol
[1]
Pin description
Pin
TSSOP48
1
2
3
Type
Description
HVQFN48
44
45
46
V
CC
REGGND
V
reg(3.3)
-
-
-
supply voltage (3.3 Vor 5.0 V)
voltage regulator ground supply
regulated supply voltage (3.3 V
±
10 %)
from internal regulator; used to connect
decoupling capacitor and pull-up resistor on
D
+
line;
Remark:
Cannot be used to supply external
devices.
USB D
connection (analog)
USB D
+
connection (analog)
V
BUS
sensing input
GoodLink LED indicator output (open-drain,
8 mA); the LED is default ON, blinks OFF
upon USB traffic; to connect an LED use a
series resistor of 470
(V
CC
= 5.0 V) or
330
(V
CC
= 3.3 V)
wake-up input (edge triggered,
LOW to HIGH); generates a remote
wake-up from ‘suspend’ state
‘suspend’ state indicator output (4 mA);
used as power switch control output (active
LOW) for powered-off application
D
D
+
V
BUS
GL
4
5
6
7
47
48
1
2
AI/O
AI/O
I
O
WAKEUP
8
3
I
SUSPEND
9
4
O
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