參數(shù)資料
型號: HYS64T16000HDL-2.5-A
廠商: INFINEON TECHNOLOGIES AG
元件分類: DRAM
英文描述: 16M X 64 DDR DRAM MODULE, 0.4 ns, DMA200
封裝: GREEN, SODIMM-200
文件頁數(shù): 43/46頁
文件大?。?/td> 833K
代理商: HYS64T16000HDL-2.5-A
HYS64T[16/32/64]0xxxHDL–[2.5/3.7/5]–A
Small Outline DDR2 SDRAM Modules
Overview
Data Sheet
3
Rev. 1.1, 2005-06
02182004-HWZ1-64OM
1.2
Description
The INFINEON HYS64T[16/32/64]0xxxHDL–[2.5/3.7/5]–A module family are Small Outline modules “SO-DIMMs”
with 30.0-mm height based on DDR2 technology. DIMMs are available as non-ECC modules in 16M
× 64
(128 MB), 32M
× 64 (256 MB) and 64Mx64 (512 MB) organization and density, intended for mounting into 200-pin
connector sockets.
The memory array is designed with 256-Mbit Double-Data-Rate-Two (DDR2) Synchronous DRAMs. Decoupling
capacitors are mounted on the PCB. The DIMMs feature serial presence detect based on a serial E2PROM device
using the 2-pin I2C protocol. The first 128 bytes are programmed with configuration data and are write protected;
the second 128 bytes are available to the customer.
Table 2
Performance for DDR2-533 and DDR2-400
Product Type Speed Code
–3.7
–5
Units
Speed Grade
PC2–4200 4–4–4
PC2–3200 3–3–3
Max. Clock Frequency
@CL5
f
CK5
266
200
MHz
@CL4
f
CK4
266
200
MHz
@CL3
f
CK3
200
MHz
Min. RAS-CAS-Delay
t
RCD
15
ns
Min. Row Precharge Time
t
RP
15
ns
Min. Row Active Time
t
RAS
45
40
ns
Min. Row Cycle Time
t
RC
60
55
ns
Table 3
Ordering Information for RoHS Compliant Products
Product Type1)
1) All product types end with a place code, designating the silicon die revision. Example: HYS64T16000HDL–5–A, indicating
Rev. “A” dies are used for DDR2 SDRAM components. For all INFINEON DDR2 module and component nomenclature see
Chapter 6 of this data sheet.
Compliance Code2)
2) The Compliance Code is printed on the module label and describes the speed grade, for example “
PC2–4200S–444–
11–C0”, where 4200S means SO-DIMM with 4.26 GB/sec Module Bandwidth and “444-11” means Column Address
Strobe (CAS) latency = 4, Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest
JEDEC SPD Revision 1.1 and produced on the Raw Card “C”.
Description
SDRAM Technology
PC2-6400
HYS64T16000HDL–2.5–A 128MB 1Rx16 PC2–6400S–666–12–C0 1 Rank, Non-ECC 256 Mbit (
×16)
HYS64T32020HDL–2.5–A 256MB 2Rx16 PC2–6400S–666–12–A0 2 Ranks, Non-ECC 256 Mbit (
×16)
HYS64T64021HDL–2.5–A 512MB 2R
ξ8 PC2–6400S–666–12–F0
2 Ranks, Non-ECC 256 Mbit (
×8)
PC2-4200
HYS64T16000HDL–3.7–A 128MB 1Rx16 PC2–4200S–444–11–C0 1 Rank, Non-ECC 256 Mbit (
×16)
PC2-3200
HYS64T16000HDL–5–A
128MB 1Rx16 PC2–3200S–333–11–C0 1 Rank, Non-ECC 256 Mbit (
×16)
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