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參數(shù)資料
| 型號： | GS8170S18 |
| 廠商： | GSI TECHNOLOGY |
| 英文描述： | 16Mb（1M x 18Bit）Synchronous SRAM(16M位（1M x 18位）同步靜態(tài)RAM) |
| 中文描述： | 16Mb的（100萬x 18位）同步SRAM（1,600位（100萬× 18位）同步靜態(tài)內(nèi)存） |
| 文件頁數(shù)： | 9/38頁 |
| 文件大?。?/td> | 934K |
| 代理商： | GS8170S18 |
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Rev: 1.01 11/2000
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
9/38
2000, Giga Semiconductor, Inc.
A
Advanced Information
GS8170S18/36/72B-333/300/275/250
Read Operations
Flow Through Read
A Flow Through Read cycle sends data to the output drivers immediately after the address and read command are captured in the
input registers. The main clock input, CK, need not ever fire again for data to be driven out. Normally, Flow Through mode is
employed in situations where the latency of the RAM (the Flow Through tKHQV) is appreciably shorter than the bus frequency of
the application.
Read
Deselect
Write
Read
Hi-Z
Read
D
Access
Key
E
F
CK
Address
A
XX
/E
1
/W
DQ
C
QE
DC
QA
QD
Sigma Early Write with Flow Through Read
F
/E
1
QE
DB
/W
DQ
QA
DD
QC
Read
D
E
CK
Address
A
B
Access
Read
Write
Read
Key
Hi-Z
C
Write
Sigma Late Write with Flow Through Read
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| GS8180D18 | 1Mb x 18Bit Separate I/O Sigma DDR SRAM(1M x 18位獨立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM) |
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| GS8171DW36AC-300I | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 1.8NS 209FBGA - Trays |
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| GS8171DW36AC-350I | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 1.7NS 209BGA - Trays |
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