參數(shù)資料
型號: GS8170S18
廠商: GSI TECHNOLOGY
英文描述: 16Mb(1M x 18Bit)Synchronous SRAM(16M位(1M x 18位)同步靜態(tài)RAM)
中文描述: 16Mb的(100萬x 18位)同步SRAM(1,600位(100萬× 18位)同步靜態(tài)內(nèi)存)
文件頁數(shù): 24/38頁
文件大?。?/td> 934K
代理商: GS8170S18
Rev: 1.01 11/2000
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
24/38
2000, Giga Semiconductor, Inc.
A
Advanced Information
GS8170S18/36/72B-333/300/275/250
Operating Currents
Parameter
Test Conditions
Symbol
-333
0°C to 70°C
–40°C to +85°C
Operating Current
E1
V
IL
Max.
tKHKH
tKHKH Min.
G
V
IH
All other inputs
V
IL
V
IN
V
IH
I
DDP
Pipeline
TBD mA
TBD mA
I
DDF
Flow-through
TBD mA
TBD mA
Bank Deselect Current
E2 or E3 False
tKHKH
tKHKH Min.
G
V
IH
All other inputs
V
IL
V
IN
V
IH
I
SB1
Pipeline
TBD mA
TBD mA
I
SB1
Flow-through
TBD mA
TBD mA
Chip Disable Current
E1
V
IH
Min.
tKHKH
tKHKH Min.
G
V
IH
All other inputs
V
IL
V
IN
V
IH
I
SB2
Pipeline
TBD mA
TBD mA
I
SB2
Flow-through
TBD mA
TBD mA
CMOS Deselect Current
Device Deselected
All inputs
V
SS
+ 0.10 V
V
IN
V
DD
– 0.10 V
I
DD3
Pipeline
TBD mA
TBD mA
I
DD3
Flow-through
TBD mA
TBD mA
相關PDF資料
PDF描述
GS8170S72 16Mb(256K x 72Bit)Synchronous SRAM(16M位(256K x 72位)同步靜態(tài)RAM)
GS8180D09 2Mb x 9Bit Separate I/O Sigma DDR SRAM(2M x 9位獨立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM)
GS8180D18 1Mb x 18Bit Separate I/O Sigma DDR SRAM(1M x 18位獨立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM)
GS8180S36 512K x 36Bit Separate I/O Sigma DDR SRAM(512K x 36位獨立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM)
GS8180S18 1Mb x 18Bit Separate I/O Sigma DDR SRAM(1M x 18位獨立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM)
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