參數(shù)資料
型號(hào)： GS8170S18
廠商： GSI TECHNOLOGY
英文描述： 16Mb（1M x 18Bit）Synchronous SRAM(16M位（1M x 18位）同步靜態(tài)RAM)
中文描述： 16Mb的（100萬x 18位）同步SRAM（1,600位（100萬× 18位）同步靜態(tài)內(nèi)存）
文件頁(yè)數(shù)： 25/38頁(yè)
文件大小： 934K
代理商： GS8170S18
Rev: 1.01 11/2000
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
25/38
2000, Giga Semiconductor, Inc.
A
Advanced Information
GS8170S18/36/72B-333/300/275/250
AC Electrical Characteristics
Parameter
Symbol
-333
-300
-275
-250
Unit Notes
Min Max Min Max Min Max Min Max
Pipeline
Read
Clock Cycle Time
tKHKH
3.0
—
3.3
—
3.6
—
4.0
—
ns
—
Clock High to Output Valid
tKHQV
1.6
1.8
1.9
2.1
ns
—
Clock High to Output in High-Z
tKHQZ
0.5
1.6
0.5
1.8
0.5
1.9
0.5
2.1
ns
1
Clock High to Output Invalid
tKHQX
0.5
—
0.5
—
0.5
—
0.5
—
ns
—
Clock High to Output in Low-Z
tKHQX1
0.5
—
0.5
—
0.5
—
0.5
—
ns
1
Clock High to Echo Clock Low-Z
tKHCX1
0.5
—
0.5
—
0.5
—
0.5
—
ns
2, 4
Clock High to Echo Clock High
tKHCH
0.5
1.5
0.5
1.7
0.5
1.8
0.5
2.0
ns
4
Clock Low to Echo Clock Low
tKLCL
0.5
1.7
0.5
1.9
0.5
2.0
0.5
2.3
ns
4
Output Invalid to Echo Clock High
tCHQX
—
-0.5
—
-0.6
—
-0.6
—
-0.7
ns
2
Echo Clock High to Output Valid
tCHQV
—
0.5
—
0.6
—
0.6
—
0.7
ns
2
Clock High to Echo Clock High-Z
tKHCZ
0.5
1.5
0.5
1.7
0.5
1.8
0.5
2.0
ns
1, 2
Flow
Through
Read
Clock Cycle Time
tKHKH
7.0
—
7.7
—
8.4
—
9.3
—
ns
—
Clock High to Output Valid
tKHQV
5.0
—
5.5
—
6.0
—
6.7
ns
—
Clock High to Output in High-Z
tKHQZ
1.0
5.0
1.0
5.5
1.0
6.0
1.0
6.7
ns
1
Clock High to Output Invalid
tKHQX
1.0
—
1.0
—
1.0
—
1.0
—
ns
—
Clock High to Output in Low-Z
tKHQX1
0.5
—
0.5
—
0.5
—
0.5
—
ns
1
Clock HIGH Time
tKHKL
1.2
—
1.3
—
1.4
—
1.6
—
ns
—
Clock LOW Time
tKLKH
1.2
—
1.3
—
1.4
—
1.6
—
ns
—
Address Valid to Clock High
tAVKH
0.6
—
0.7
—
0.7
—
0.8
—
ns
—
Clock High to Address Don’t Care
tKHAX
0.4
—
0.4
—
0.5
—
0.5
—
ns
—
Enable Valid to Clock High
tEVKH
0.6
—
0.7
—
0.7
—
0.8
—
ns
—
Clock High to Enable Don’t Care
tKHEX
0.4
—
0.4
—
0.5
—
0.5
—
ns
—
Write Valid to Clock High
tWVKH
0.6
—
0.7
—
0.7
—
0.8
—
ns
—
Clock High to Write Don’t Care
tKHWX
0.4
—
0.4
—
0.5
—
0.5
—
ns
—
Byte Write Valid to Clock High
tBVKH
0.6
—
0.7
—
0.7
—
0.8
—
ns
—
Clock High to Byte Write Don’t Care
tKHBX
0.4
—
0.4
—
0.5
—
0.5
—
ns
—
Data In Valid to Clock High
tDVKH
0.6
—
0.7
—
0.7
—
0.8
—
ns
—
Clock High to Data In Don’t Care
tKHDX
0.4
—
0.4
—
0.5
—
0.5
—
ns
—
Notes:
1.
2.
3.
4.
Measured at 100 mV from steady state. Not 100% tested.
Guaranteed by design. Not 100% tested.
For any specific temperature and voltage tKHCZ < tKHCX1.
Tested using AC Test Load B
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