參數(shù)資料
型號(hào): GS8170S18
廠商: GSI TECHNOLOGY
英文描述: 16Mb(1M x 18Bit)Synchronous SRAM(16M位(1M x 18位)同步靜態(tài)RAM)
中文描述: 16Mb的(100萬(wàn)x 18位)同步SRAM(1,600位(100萬(wàn)× 18位)同步靜態(tài)內(nèi)存)
文件頁(yè)數(shù): 27/38頁(yè)
文件大?。?/td> 934K
代理商: GS8170S18
Rev: 1.01 11/2000
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
27/38
2000, Giga Semiconductor, Inc.
A
Advanced Information
GS8170S18/36/72B-333/300/275/250
Timing Parameter Key—Read Cycle Timing
tKHQX1
tKHQV
tKHQX
tKHQZ
tKHQX1
tKHQV
tAVKH
tKHAX
tKHQX
tKHQZ
tKHCH
CK
A
DQ (Flow through)
DQ (Pipelined)
tKHKH
tKLKH
tKHKL
A
B
C
QA
QB
QA
CQ
tCHQV
tCHQX
tKHCX1
tKLCL
tKHCZ
= CQ High Z
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PDF描述
GS8170S72 16Mb(256K x 72Bit)Synchronous SRAM(16M位(256K x 72位)同步靜態(tài)RAM)
GS8180D09 2Mb x 9Bit Separate I/O Sigma DDR SRAM(2M x 9位獨(dú)立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM)
GS8180D18 1Mb x 18Bit Separate I/O Sigma DDR SRAM(1M x 18位獨(dú)立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM)
GS8180S36 512K x 36Bit Separate I/O Sigma DDR SRAM(512K x 36位獨(dú)立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM)
GS8180S18 1Mb x 18Bit Separate I/O Sigma DDR SRAM(1M x 18位獨(dú)立I/O接口雙數(shù)據(jù)速率讀和寫模式靜態(tài)ΣRAM)
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