
CHRONTEL
CH7002D
18 201-0000-029 Rev6.1, 8/2/99
Transfer Protocol
Both read and write cycles can be executed in “Alternating” and “Auto-increment” modes. Alternating mode
expects a register address prior to each read or write from that location (i.e., transfers alternate between address and
data). Auto-increment mode allows you to establish the initial register location, then automatically increments the
register address after each subsequent data access (i.e., transfers will be address, data, data, data). A basic serial port
transfer protocol is shown in
Figure 18
below.
Figure 18: Serial Port Transfer Protocol
1. The transfer sequence is initiated when a high-to-low transition of SD occurs while SC is high, this is the
“START” condition. Transitions of address and data bits can only occur while SC is low.
2. The transfer sequence is terminated when a low-to-high transition of SD occurs while SC is high, this is the
“STOP” condition.
3. Upon receiving the first START condition, the CH7002 expects a
Register Address Byte (RAB)
from the
master device. The format of the
RAB
byte is shown below (note that B[2:0] is determined by the state of
the ADDR pin).
Device Address Byte (DAB)
R/W
Read/Write Indicator
“0”:
master device will write to the CH7002 at the register location specified by the address
AR[3:0]
“1”:
master device will read from the CH7002 at the register location specified by the
address AR[3:0.]. After the DAB is received, the CH7002 expects a Register Address
Byte (RAB) from the master. The format of the RAB is shown below (note that B4, B5,
and B7 are not used).
B7
B6
B5
B4
B3
B2
B1
B0
1
1
1
0
1
ADDR*
ADDR
R/W
SD
SC
1 - 8
9
Data
1
ACK
acCH7002
Condition
Start
Condition
Stop
CH7002
acknowledge
1 - 8
Data n
9
acCH7002
1 - 7
Device ID
8
R/W*
9
ACK
I
2
C