參數(shù)資料
型號(hào): AT85C51SND3B1-RTTUL
廠商: Atmel
文件頁(yè)數(shù): 38/119頁(yè)
文件大?。?/td> 0K
描述: IC DECODER/ENCODER DGTL 100-LQFP
標(biāo)準(zhǔn)包裝: 90
類型: 音頻編碼器/解碼器
應(yīng)用: 移動(dòng)電話,手機(jī),視頻顯示器
電壓 - 電源,數(shù)字: 1.65 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)當(dāng)前第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)
25
AT85C51SND3B
7632D–MP3–01/07
Figure 13. Reset Circuitry and Power-On Reset
Cold Reset
2 conditions are required before enabling a CPU start-up:
VDD must reach the specified VDD range
The level on X1 input pin must be outside the specification (VIH, VIL)
If one of these 2 conditions are not met, the microcontroller does not start correctly and
can execute an instruction fetch from anywhere in the program space. An active level
applied on the RST pin must be asserted till both of the above conditions are met. A
reset is active when the level VIL is reached and when the pulse width covers the period
of time where VDD and the oscillator are not stabilized. 2 parameters have to be taken
into account to determine the reset pulse width:
VDD rise time,
Oscillator startup time.
To determine the capacitor value to implement, the highest value of these 2 parameters
has to be chosen.
Warm Reset
To achieve a valid reset, the reset signal must be maintained for at least 2 machine
cycles (24 oscillator clock periods) while the oscillator is running. The number of clock
periods is mode independent (X2 or X1).
Watchdog Timer Reset
As detailed in Section “Watchdog Timer”, page 75, the WDT generates a 96-clock
period pulse on the RST pin. In order to properly propagate this pulse to the rest of the
application in case of external capacitor or power-supply supervisor circuit, a 1 k resis-
tor must be added as shown in Figure 14.
Figure 14. Reset Circuitry for WDT Reset-out Usage
Power Fail Detector
The Power Fail Detector (PFD) ensures that whole product is in reset when internal volt-
age is out of its limits specification. PFD limits are detailed in the Section “DC
Characteristics”, page 242.
RST
RRST
IOVDD
N
IOVSS
To CPU Core
and Peripherals
RST
IOVSS
+
Power-on Reset
RST input circuitry
From Internal
Reset Source
RRST
RST
IOVDD
To CPU Core
and Peripherals
IOVSS
+
N
IOVSS
From WDT
Reset Source
1K
To Other
On-board
Circuitry
相關(guān)PDF資料
PDF描述
AT87251G2D-RLTUM IC MCU 8/16BIT 32K OTP 44-VQFP
AT87C51RB2-SLRUM MCU ROMLESS 16K OTP 44-PLCC
AT87C52X2-RLRUM MCU ROMLESS 32X2 3V 44-VQFP
AT87C58X2-SLRUM MCU 8051 32K EPROM 44PLCC
AT87F51-24PI IC MICRO CTRL 24MHZ 40DIP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT85C51SND3B2-RTTUL 功能描述:音頻 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
AT85C51SND3BX 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:MP3 Microcontrollers
AT85C51SND4B1-7FTUL 功能描述:音頻 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
AT85DVK-07 功能描述:開發(fā)板和工具包 - 8051 DEV Kit SND3 RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
AT85EC5122 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:MICROCONTROLLER WITH USB AND SMART CARD READER INTERFACES