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92
AT85C51SND3B
7632D–MP3–01/07
OTG Timers Customizing It is possible to refine some OTG timers thanks to the OTGTCON register (see
Table 108). This register is multiplexed with the OTGCON register. The timers are as
defined in the OTG specification:
AWaitVrise time-out. [OTG] chapter 6.6.5.1
VbBusPulsing. [OTG] chapter 5.3.4
PdTmOutCnt. [OTG] chapter 5.3.2
SRPDetTmOut. [OTG] chapter 5.3.3
Table 101. OTG Timer Configuration
Plug-in detection
The USB connection is detected by the VBUS pad, thanks to the following architecture:
Figure 57. Plug-in Detection Input Block Diagram
PAGE1:0
VALUE2:0
Timing Parameter
00
AWaitVrise time-out = 20 ms.
01
AWaitVrise time-out = 50 ms.
10
AWaitVrise time-out = 70 ms.
11
AWaitVrise time-out = 100 ms.
01
00
VbBusPulsing = 15 ms.
01
VbBusPulsing = 23 ms.
10
VbBusPulsing = 31 ms.
11
VbBusPulsing = 40 ms.
10
00
PdTmOutCnt = 96 ms.
01
PdTmOutCnt = 105 ms.
10
PdTmOutCnt = 118 ms.
11
PdTmOutCnt = 131 ms.
11
00
SRPDetTmOut = 10 s.
01
SRPDetTmOut = 100 s.
10
SRPDetTmOut = 1 ms.
11
SRPDetTmOut = 11 ms.
VBUSTI
USBINT.0
UVCC
VBUS
USBSTA.0
VSS
VDD
Pad logic
Logic
Session_valid
Va_Vbus_valid
R
P
U
R
P
U
VBus_pulsing
VBus_discharge