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參數(shù)資料
| 型號： | ADV7188BSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 103/112頁 |
| 文件大小： | 0K |
| 描述： | IC DECODER VID MULTIFORM 80LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 視頻解碼器 |
| 應(yīng)用： | 機(jī)頂盒，視頻播放器，錄音機(jī) |
| 電壓 - 電源，模擬： | 3.15 V ~ 3.45 V |
| 電壓 - 電源，數(shù)字： | 1.65 V ~ 2 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 托盤 |
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ADV7188
Rev. A | Page 90 of 112
Bit1
Address
Register
Bit Description
7 6 5 4 3 2 1 0 Comments
Notes
0x31
Reserved.
0 1 0 Set to default
Vsync Field
Control 1
0
Start of line relative to HSE
HSE = hsync end.
HVSTIM. This bit selects where within a line of
video the VS signal is asserted.
1
Start of line relative to HSB
HSB = hsync begin.
NEWAVMODE. Sets the EAV/SAV mode.
0
EAV/SAV codes generated to suit
ADI encoders
1
Manual VS/FIELD position
controlled by Registers 0x32, 0x33,
and 0xE5 to 0xEA
Reserved.
0 0 0
Set to default
0x32
Reserved.
0 0 0 0 0 1 Set to default
NEWAVMODE bit must be set high.
Vsync Field
Control 2
0
VS goes high in the middle of the
line (even field)
VSBHE.
1
VS changes state at the start of the
line (even field)
0
VS goes high in the middle of the
line (odd field)
VSBHO.
1
VS changes state at the start of the
line (odd field)
Reserved.
0 0 0 1 0 0 Set to default
0
VS goes low in the middle of the
line (even field)
VSEHE.
1
VS changes state at the start of the
line (even field)
0
VS goes low in the middle of the
line (odd field)
0x33
Vsync Field
Control 3
VSEHO.
1
VS changes state at the start of the
line (odd field)
NEWAVMODE bit must be set high.
HSE [10:8]. HS end. These bits allow the posi-
tioning of the HS output within the video line.
0 0 0 HS output ends HSE [10:0] pixels
after the falling edge of hsync
Using HSB and HSE, the user can
program the position and length of
the output hsync.
Reserved.
0
Set to 0
HSB [10:8]. HS begin. These bits allow the posi-
tioning of the HS output within the video line.
0 0 0
HS output starts HSB [10:0] pixels
after the falling edge of hsync
0x34
Hsync Position
Control 1
Reserved.
0
Set to 0
0x35
Hsync Position
Control 2
HSB [7:0]. Using HSB [10:0] and HSE [10:0]
(see Register 0x34), the user can program the
position and length of the HS output signal.
0 0 0 0 0 0 1 0
0x36
Hsync Position
Control 3
HSE [7:0]. See Registers 0x34 and 0x35.
0 0 0 0 0 0 0 0
0 Invert polarity
PCLK. Sets the polarity of LLC.
1 Normal polarity, as per the timing
diagrams (
4)
Sets the polarity of LLC on both LLC1
and LLC2.
Reserved.
0 0
Set to 0
0
Active high
PF. Sets the FIELD polarity.
1
Active low
Reserved.
0
Set to 0
0
Active high
PVS. Sets the VS polarity.
1
Active low
Reserved.
0
Set to 0
0
Active high
0x37
Polarity
PHS. Sets the HS polarity.
1
Active low
0x38
NTSC Comb Control
0 0 0 Adaptive 3-line, 3-tap luma
1 0 0 Use low-pass notch
1 0 1 Fixed luma comb (two lines)
Top lines of memory.
1 1 0 Fixed luma comb (three lines)
All lines of memory.
YCMN [2:0]. Luma comb mode NTSC.
1 1 1 Fixed luma comb (two lines)
Bottom lines of memory.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7189 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder |
| ADV7189B | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder |
| ADV7189BBSTZ | 功能描述:IC VIDEO DECODER SDTV 80-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7189BBSTZ268H | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder |
| ADV7189BBSTZ268H2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder |
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