參數(shù)資料
型號： 9S12KT256DGV1
英文描述： MC9S12KT256 Device User Guide
中文描述： MC9S12KT256設(shè)備用戶指南
文件頁數(shù)： 76/126頁
文件大?。?/td> 7307K
代理商： 9S12KT256DGV1
Device User Guide — 9S12KT256DGV1/D V01.09
76
Freescale Semiconductor
Section 5 Resets and Interrupts
5.1 Overview
Consult the Exception Processing section of the CPU12 Reference Manual for information on resets and
interrupts. Both local masking and CCR masking are included as listed in
Table 5-1
. System resets can
be generated through external control of the RESET pin, through the clock and reset generator module
CRG or through the low voltage reset (LVR) generator of the voltage regulator module. Refer to the CRG
and VREG Block Guides for detailed information on reset generation.
5.2 Vectors
5.2.1 Vector Table
(Table 5-1)
lists interrupt sources and vectors in default order of priority.
Table 5-1 Interrupt Vector Locations
Vector Address
Interrupt Source
CCR
Mask
Local Enable
HPRIO Value
to Elevate
$FFFE, $FFFF
External Reset, Power On Reset or Low
Voltage Reset (see CRG Flags Register
to determine reset source)
Clock Monitor fail reset
COP failure reset
Unimplemented instruction trap
SWI
XIRQ
IRQ
Real Time Interrupt
Standard Timer channel 0
Standard Timer channel 1
Standard Timer channel 2
Standard Timer channel 3
Standard Timer channel 4
Standard Timer channel 5
Standard Timer channel 6
Standard Timer channel 7
Standard Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI0
None
None
–
$FFFC, $FFFD
$FFFA, $FFFB
$FFF8, $FFF9
$FFF6, $FFF7
$FFF4, $FFF5
$FFF2, $FFF3
$FFF0, $FFF1
$FFEE, $FFEF
$FFEC, $FFED
$FFEA, $FFEB
$FFE8, $FFE9
$FFE6, $FFE7
$FFE4, $FFE5
$FFE2, $FFE3
$FFE0, $FFE1
$FFDE, $FFDF
$FFDC, $FFDD
$FFDA, $FFDB
$FFD8, $FFD9
None
None
None
None
X-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
PLLCTL (CME, FCME)
COP rate select
None
None
None
IRQCR (IRQEN)
CRGINT (RTIE)
TIE (C0I)
TIE (C1I)
TIE (C2I)
TIE (C3I)
TIE (C4I)
TIE (C5I)
TIE (C6I)
TIE (C7I)
TSCR2 (TOI)
PACTL (PAOVI)
PACTL (PAI)
SPICR1 (SPIE, SPTIE)
SCICR2
(TIE, TCIE, RIE, ILIE)
SCICR2
(TIE, TCIE, RIE, ILIE)
ATDCTL2 (ASCIE)
–
–
–
–
–
$F2
$F0
$EE
$EC
$EA
$E8
$E6
$E4
$E2
$E0
$DE
$DC
$DA
$D8
$FFD6, $FFD7
SCI0
I-Bit
$D6
$FFD4, $FFD5
SCI1
I-Bit
$D4
$FFD2, $FFD3
ATD0
I-Bit
$D2
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