XRT94L33
xr
Rev.1.2.0.
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
162
XRT94L33 is operating in the Multi-PHY mode, the Transmit UTOPIA Interface block will support two kinds of
operations with the ATM Layer processor:
Polling for “available” UNI (PHY Layer) devices.
Selecting which UNI (out of several possible UNI devices) to write ATM cell data to.
Each of these operations is discussed in the sections below. However, prior to discussing each of these
operations, the reader must understand the following.
“Multi-PHY” operation involves the use of one (1) ATM Layer processor and several UNI (or PHY-Layer)
devices, within a system. The ATM Layer processor is expected to read/write ATM cell data from/to these
UNI devices.
Hence, “Multi-PHY” operation requires, at a minimum, some means for the ATM Layer
processor to uniquely identify a particular UNI device (among all of the UNI devices within the “Multi-PHY”
system) that it wishes to “poll”, write ATM cell data to, or read ATM cell data from. Actually, “Multi-PHY”
operation provides an addressing scheme allows the ATM Layer processor to uniquely identify “UTOPIA
Interface Blocks” (e.g., Transmit and Receive) within all of the UNI devices, operating in the “Multi-PHY”
system. In order to uniquely identify a given “UTOPIA Interface block”, within a “Multi-PHY” system, each
“Transmit and Receive UTOPIA Interface Blocks are assigned a 5-bit “UTOPIA address” value. The user
assigns this address value to a particular “Transmit UTOPIA Interface block” by writing this address value into
the “Transmit UTOPIA Address Register” (Address = 0x0593) and appropriate data into the “Transmit
UTOPIA Port Address” Register (Address = 0x0597); within its “host” XRT94L33; per the procedure (as
presented below). The bit-format of the “Transmit UTOPIA Address Register” and “Transmit Port Address”
Register is presented below.
Transmit UTOPIA Address Register (Address = 0x0593)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Tx_UTOPIA_Addr[4:0]
RO
R/W
0
X
Transmit UTOPIA Port Number Register (Address = 0x0597)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Tx_UTOPIA_Port_Number[4:0]
R/O
R/W
0
X
2.2.1.3.7
Assigning Transmit UTOPIA Addresses to Each STS-3c Channel within the XRT94L33
The XRT94L33 can be configured to function as a three channel ATM UNI over either an STS-3 signal or an
STS-3c.
As a consequence, for Multi-PHY Operation, the XRT94L33 can be assigned as many as four
“Transmit UTOPIA Addresses” at a given time (one for each STS-1 channel).
The user can assign a “Transmit UTOPIA Address” value to a given channel, within the XRT94L33 by
executing the following steps.
STEP 1 – Assign a “Transmit UTOPIA Address” to Channel 0
The user can accomplish this by doing the following.
STEP 1a – Set Bits 0 through 4 (“Tx_UTOPIA_Port_Number[4:0]”) within the “Transmit UTOPIA Port
Number Register” to “0x00”; as depicted below.