參數(shù)資料
型號(hào)： W9425G6EH-5I
廠商： WINBOND ELECTRONICS CORP
元件分類(lèi)： DRAM
英文描述： 16M X 16 DDR DRAM, 0.7 ns, PDSO66
封裝： 0.400 INCH, ROHS COMPLIANT, TSOP2-66
文件頁(yè)數(shù)： 19/54頁(yè)
文件大?。?/td> 0K
代理商： W9425G6EH-5I
W9425G6EH
Publication Release Date:Dec. 03, 2008
- 26 -
Revision A08
9.5 DC Characteristics
MAX.
SYM.
PARAMETER
-4
-5/-5I
-6/-6I
UNIT
NOTES
IDD0
Operating current: One Bank Active-Precharge; tRC = tRC min;
tCK = tCK min; DQ, DM and DQS inputs changing twice per clock
cycle; Address and control inputs changing once per clock cycle
110
mA
7
IDD1
Operating current: One Bank Active-Read-Precharge; Burst = 2;
tRC = tRC min; CL = 3; tCK = tCK min; IOUT = 0 mA; Address and
control inputs changing once per clock cycle.
150
7, 9
IDD2P
Precharge Power Down standby current: All Banks Idle; Power
down mode; CKE < VIL max; tCK = tCK min; Vin = VREF for DQ,
DQS and DM
20
IDD2F
Idle floating standby current: CS > VIH min; All Banks Idle;
CKE > VIH min; Address and other control inputs changing once
per clock cycle; Vin = Vref for DQ, DQS and DM
45
7
IDD2N
Idle standby current: CS > VIH min; All Banks Idle; CKE > VIH
min; tCK = tCK min; Address and other control inputs changing
once per clock cycle; Vin > VIH min or Vin < VIL max for DQ,
DQS and DM
45
7
IDD2Q
Idle quiet standby current: CS > VIH min; All Banks Idle; CKE
> VIH min; tCK = tCK min; Address and other control inputs
stable; Vin > VREF for DQ, DQS and DM
40
7
IDD3P
Active Power Down standby current: One Bank Active; Power
down mode; CKE < VIL max; tCK = tCK min
20
IDD3N
Active standby current: CS > VIH min; CKE > VIH min; One
Bank Active-Precharge; tRC = tRAS max; tCK = tCK min; DQ, DM
and DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
70
7
IDD4R
Operating current: Burst = 2; Reads; Continuous burst; One
Bank Active; Address and control inputs changing once per
clock cycle; CL=3; tCK = tCK min; IOUT = 0mA
210
180
170
7, 9
IDD4W
Operating current: Burst = 2; Write; Continuous burst; One Bank
Active; Address and control inputs changing once per clock
cycle; CL = 3; tCK = tCK min; DQ, DM and DQS inputs changing
twice per clock cycle
210
180
170
7
IDD5
Auto Refresh current: tRC = tRFC min
190
7
IDD6
Self Refresh current: CKE < 0.2V
3
IDD7
Random Read current: 4 Banks Active Read with activate every
20nS, Auto-precharge Read every 20 nS; Burst = 4; tRCD = 3;
IOUT = 0mA; DQ, DM and DQS inputs changing twice per clock
cycle; Address changing once per clock cycle
300
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W9425G6JB-5 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.5V 60-Pin TFBGA 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY 制造商:Winbond 功能描述:16MX16,256Mb DDRI DRAM ,200MHZ, BGA
W9425G6JB-5 TR 制造商:Winbond Electronics Corp 功能描述:256M DDR SDRAM X16, 200MHZ
W9425G6JB-5I 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.5V 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY
W9425G6JB-5I TR 制造商:Winbond Electronics Corp 功能描述:256M DDR SDRAM X16, 200MHZ, IN
W9425G6JH 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:4 M × 4 BANKS × 16 BITS DDR SDRAM
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