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CHAPTER 18 CLOCKED SERIAL INTERFACE A (CSIA) WITH AUTOMATIC TRANSMIT/RECEIVE FUNCTION
User’s Manual U16890EJ1V0UD
497
(1) Serial I/O shift register An (SIOAn)
This is an 8-bit register used to store transmit/receive data in 1-byte transfer mode (CSIMAn.ATEn bit = 0).
Writing transmit data to the SIOAn register starts the transfer. In addition, after a transfer completion interrupt
request signal (INTCSIAn) is generated (CSISn.TSFn bit = 0), data can be received by reading data from the
SIOAn register.
This register can be read or written in 8-bit units. However, writing to the SIOAn register is prohibited when
the CSISn.TSFn bit = 1.
After reset, this register is cleared to 00H.
Cautions 1. A transfer operation is started by writing to SIOAn register. Consequently, when
transmission is disabled (CSIMAn.TXEAn bit = 0), write dummy data to the SIOAn
register to start the transfer operation, and then perform a receive operation.
2. Do not write data to the SIOAn register while the automatic transmit/receive function is
operating.
7
SIOAn7
SIOAn
(n = 0, 1)
6
SIOAn6
5
SIOAn5
4
SIOAn4
3
SIOAn3
2
SIOAn2
1
SIOAn1
0
SIOAn0
After reset: 00H R/W Address: SIOA0 FFFFFD46H, SIOA1 FFFFFD56H
(2) Automatic data transfer address count register n (ADTCn)
This is a register used to indicate buffer RAM addresses during automatic transfer. When automatic transfer
is stopped, the data position when transfer stopped can be ascertained by reading ADTCn register value.
This register is read-only, in 8-bit units. However, reading from the ADTCn register is prohibited when the
CSISn.TSFn bit = 1.
After reset, this register is cleared to 00H.
7
ADTCn7
ADTCn
(n = 0, 1)
6
ADTCn6
5
ADTCn5
4
ADTCn4
3
ADTCn3
2
ADTCn2
1
ADTCn1
0
ADTCn0
After reset: 00H R Address: ADTC0 FFFFFD47H, ADTC1 FFFFD57H
18.3 Registers
Serial interface CSIAn is controlled by the following six registers.
Serial operation mode specification register n (CSIMAn)
Serial status register n (CSISn)
Serial trigger register n (CSITn)
Divisor selection register n (BRGCAn)
Automatic data transfer address point specification register n (ADTPn)
Automatic data transfer interval specification register n (ADTIn)