參數(shù)資料
型號(hào)： UPD703201
廠商： NEC Corp.
英文描述： 32-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 32位單晶片微控制器
文件頁(yè)數(shù)： 1/98頁(yè)
文件大?。?/td> 797K
代理商： UPD703201
MOS INTEGRATED CIRCUIT
μ
PD703201, 703201Y, 703204, 703204Y,
70F3201, 70F3201Y, 70F3204, 70F3204Y
V850ES/SA2
TM
,
V850ES/SA3
TM
32-BIT SINGLE-CHIP MICROCONTROLLERS
Document No. U15436EJ1V0PM00 (1st edition)
Date Published June 2001 N CP(K)
Printed in Japan
PRELIMINARY PRODUCT INFORMATION
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
2001
DESCRIPTION
The
μ
PD703201, 703201Y, 70F3201, and 70F3201Y (V850ES/SA2),
μ
PD703204, 703204Y, 70F3204, and
70F3204Y (V850ES/SA3) are products in the V850 Family
peripheral functions such as ROM/RAM, timer/counters, serial interfaces, an A/D converter, a D/A converter, and a
DMA controller.
In addition to their high real-time responsiveness and one-clock-pitch execution of instructions, the V850ES/SA2
and V850ES/SA3 include instructions suited to digital servo control applications such as multiplication instructions
executed via a hardware multiplier, saturation instructions, and bit manipulation instructions. As a real-time control
system, this device provides a high-level cost performance ideal for ultra-low-power DVC and portable audio
applications.
TM
of 32-bit single-chip microcontrollers, and include
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
V850ES/SA2, V850ES/SA3 User’s Manual Hardware:
V850ES User’s Manual Architecture:
To be prepared
To be prepared
FEATURES
{
Number of instructions: 83
{
Minimum instruction execution time:
59 ns (@ 17 MHz operation with main system clock (f
XX
))
74 ns (@ 13.5 MHz operation with main system clock (f
XX
))
{
General-purpose registers: 32 bits
×
32 registers
{
Instruction set:
Signed multiplication, saturation operations, 32-bit
shift instructions, bit manipulation instructions,
load/store instructions
{
Memory space:
64 MB linear address space
Memory block division function:
2 MB, 2 MB, 4 MB, 8 MB = Total four blocks
{
External bus interface: 16-bit data bus
Address bus: Separate output enabled
{
Internal memory
Mask ROM:
256 KB (
μ
PD703201, 703201Y,
703204, 703204Y)
Flash memory: 256 KB (
μ
PD70F3201, 70F3201Y,
70F3204, 70F3204Y)
RAM: 16 KB
{
Interrupts and exceptions
Non-maskable interrupts: 2 sources
Maskable interrupts:
38 sources (
μ
PD703201, 70F3201)
39 sources (
μ
PD703201Y, 70F3201Y)
39 sources (
μ
PD703204, 70F3204)
40 sources (
μ
PD703204Y, 70F3204Y)
Software exceptions: 32 sources
Exception trap: 1 source
{
I/O lines Total: 82 (V850ES/SA2)
102 (V850ES/SA3)
{
Timer/counters
16-bit timer: 2 channels
8-bit timer: 4 channels
{
Real-time counter (for watch): 1 channel
{
Watchdog timer: 1 channel
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