參數(shù)資料
型號(hào): TMP86FH09NG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PDIP32
封裝: 0.400 INCH, 1.78 MM PITCH, LEAD FREE, PLASTIC, SDIP-32
文件頁數(shù): 14/154頁
文件大小: 1433K
代理商: TMP86FH09NG
Page 100
9. 8-Bit TimerCounter (TC3, TC4)
9.1 Configuration
TMP86CH09NG
9.3.9.2 High-Frequency Warm-Up Counter Mode
(SLOW1
→ SLOW2 → NORMAL2 → NORMAL1)
In this mode, the warm-up period time from a stop of the high-frequency clock fc to the oscillation sta-
bility is obtained. Before starting the timer, set SYSCR2<XEN> to 1 to oscillate the high-frequency clock.
When a match between the up-counter and the timer register (TTREG4, 3) value is detected after the timer
is started by setting TC4CR<TC4S> to 1, the counter is cleared by generating the INTTC4 interrupt
request. After stopping the timer in the INTTC4 interrupt service routine, clear SYSCR2<SYSCK> to 0 to
switch the system clock from the low-frequency to high-frequency, and then SYSCR2<XTEN> to 0 to
stop the low-frequency clock.
Table 9-9 Setting Time in High-Frequency Warm-Up Counter Mode
Minimum time (TTREG4, 3 = 0100H)
Maximum time (TTREG4, 3 = FF00H)
16
s
4.08 ms
Example :After checking high-frequency clock oscillation stability with TC4 and 3, switching to the NORMAL1 mode
SET
(SYSCR2).7
: SYSCR2<XEN>
1
LD
(TC3CR), 63H
: Sets TFF3=0, source clock fs, and 16-bit mode.
LD
(TC4CR), 05H
: Sets TFF4=0, and warm-up counter mode.
LD
(TTREG3), 0F800H
: Sets the warm-up time.
(The warm-up time depends on the oscillator characteristic.)
DI
: IMF
0
SET
(EIRH). 3
: Enables the INTTC4.
EI
: IMF
1
SET
(TC4CR).3
: Starts the TC4 and 3.
:
PINTTC4:
CLR
(TC4CR).3
: Stops the TC4 and 3.
CLR
(SYSCR2).5
: SYSCR2<SYSCK>
0
(Switches the system clock to the high-frequency clock.)
CLR
(SYSCR2).6
: SYSCR2<XTEN>
0
(Stops the low-frequency clock.)
RETI
:
VINTTC4:
DW
PINTTC4
: INTTC4 vector table
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