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TMS470R1B768
16/32-Bit RISC Flash Microcontroller
SPNS108A–AUGUST 2005–REVISED AUGUST 2006
Table 2. Terminal Functions
TERMINAL
INTERNAL
PULLUP/
PULLDOWN
(3)
TYPE
(1)(2)
DESCRIPTION
NAME
NO.
HIGH-END TIMER (HET)
HET[0]
HET[1]
HET[2]
HET[3]
HET[4]
HET[5]
HET[6]
HET[7]
HET[8]
HET[9]
HET[10]
HET[11]
HET[12]
HET[13]
HET[14]
HET[15]
HET[16]
HET[17]
HET[18]
HET[19]
HET[20]
HET[21]
HET[22]
HET[23]
HET[24]
HET[25]
HET[26]
HET[27]
HET[28]
HET[29]
HET[30]
HET[31]
129
130
137
138
139
140
141
142
79
80
29
28
27
26
25
24
23
22
71
70
69
68
67
123
51
124
125
126
47
48
49
50
The B768 device has both the logic and registers for a full 32-I/O HET
implemented and all 32 pins are available externally.
Timer input capture or output compare. The HET[31:0] applicable pins can be
programmed as general-purpose input/output (GIO) pins. HET[23:0] are
high-resolution pins and HET[31:24] are standard-resolution pins.
The high-resolution (HR) SHARE feature allows even HR pins to share the
next higher odd-numbered HR pin structures. This HR sharing is independent
of whether or not the odd pin is available externally. If an odd pin is available
externally and shared, then the odd pin can only be used as a
general-purpose I/O. For more information on HR SHARE, see the
TMS470R1x High-End Timer (HET) Reference Guide
(literature number
SPNU199).
3.3-V I/O
IPD (20 μA)
HIGH-END CAN CONTROLLER 1 (HECC1)
IPU (20 μA)
HECC1 transmit pin or GIO pin
HECC1 receive pin or GIO pin
HIGH-END CAN CONTROLLER 2 (HECC2)
IPU (20 μA)
HECC2 transmit pin or GIO pin
HECC2 receive pin or GIO pin
HIGH-END CAN CONTROLLER 3 (HECC3)
IPU (20 μA)
HECC3 transmit pin or GIO pin
HECC3 receive pin or GIO pin
CAN1HTX
CAN1HRX
88
87
3.3-V I/O
3.3-V I/O
CAN2HTX
CAN2HRX
56
57
3.3-V I/O
3.3-V I/O
CAN3HTX
CAN3HRX
78
77
3.3 V I/O
3.3 V I/O
(1)
(2)
(3)
I = input, O = output, PWR = power, GND = ground, REF = reference voltage, NC = no connect
All I/O pins, except RST , are configured as inputs while PORRST is low and immediately after PORRST goes high.
IPD = internal pulldown, IPU = internal pullup (all internal pullups and pulldowns are active on input pins, independent of the PORRST
state.)
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