參數(shù)資料
型號(hào)： TMC2193KJC
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi)： 消費(fèi)家電
英文描述： 10 Bit Encoder
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： MQFP-100
文件頁(yè)數(shù)： 15/72頁(yè)
文件大小： 448K
代理商： TMC2193KJC
PRODUCT SPECIFICATION
TMC2193
REV. 1.0 3/26/03
15
Figure 9. Horizontal Timing
Vertical interval timing is also fully programmable, and is
established by loading the timing registers with the dura-
tion’s of each vertical timing element, the duration expressed
in PCK clock cycles. In this way as with horizontal program-
ming, any pixel rate between 10 and 15 Mpps can be accom-
modated, and any desired standard or non-standard vertical
video timing may be produced.
Like horizontal timing parameters, vertical timing parame-
ters are calculated as follows:
t = N x ( PCK period )
= N x ( 2 x PXCK period )
where N is the value loaded into the appropriate timing reg-
ister, and PCK is the pixel clock period.
The vertical interval comprises several different line types
based upon H, the Horizontal line time.
H = (2 x SL) + (2 x SH) [Vertical sync pulses]
= (2 x EL) + (2 x EH) [Equalization pulses]
Figure 10. Horizontal Timing
–
Vertical Blanking
The VB and VC control registers are added to produce the
half-lines needed in the vertical interval at the beginning and
end of some fields. These must properly mate with compo-
nents of the normal lines.
BR
BU
CBP
VA
FP
65-6294-10
SY
Table 8. Horizontal Timing Speci
fi
cations
Parameter
FP
SY
BR
BU
CBP
VA
H
NTSC-M
(
μ
s)
1.5
4.7
0.6
2.5
1.6
52.6556
63.5556
PAL-I
(
μ
s)
1.65
4.7
0.9
2.25
2.55
51.95
64.0
PAL-M
(
μ
s)
1.9
4.95
0.9
2.25
1.8
51.692
63.492
EL
H/2
H
EH
SL
SH
65-6294-11
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