參數(shù)資料
型號(hào)： TMC2072
廠商： Fairchild Semiconductor Corporation
英文描述： Genlocking Video Digitizer
中文描述： 同步鎖相視頻數(shù)字化儀
文件頁(yè)數(shù)： 4/21頁(yè)
文件大?。?/td> 160K
代理商： TMC2072
TMC2072
PRODUCT SPECIFICATION
4
REV. 1.0.4 6/19/01
Data Transfer via Serial Interface
For each byte of data read or written, the MSB is the first bit
of the sequence.
If the TMC2072 does not acknowledge the master device
during a write sequence, the SDA remains HIGH so the mas-
ter can generate a stop signal. If the master device does not
acknowledge the TMC2072 during a read sequence, the
TMC2072 interprets this as “end of data.” The SDA remains
HIGH so the master can generate a stop signal.
Writing data to specific control registers of the TMC2072
requires that the 8-bit address of the control register of inter-
est be written after the slave address has been established.
This control register address is the base address for subse-
quent write operations. The base address autoincrements by
one for each byte of data written after the data byte intended
for the base address. If more bytes are transferred than there
are available addresses, the address will not increment and
remain at its maximum value of 10h. Any base address
higher than 10h will not produce an ACKnowledge signal.
If no ACKnowledge is received from the master, the encoder
will automatically stop sending data.
Data are read from the control registers of the TMC2072 in
a similar manner. Reading requires two data transfer
operations:
The base address must be written with the R/W bit of the
slave address byte LOW to set up a sequential read
operation.
Reading (the R/W bit of the slave address byte HIGH)
begins at the previously established base address. The
address of the read register autoincrements after each byte is
transferred.
To terminate a read/write sequence to the TMC2072, a stop
signal must be sent. A stop signal comprises a LOW-to-
HIGH transition of SDA while SCL is HIGH.
A repeated start signal occurs when the master device driv-
ing the serial interface generates a start signal without first
generating a stop signal to terminate the current communica-
tion. This is used to change the mode of communication
(read, write) between the slave and master without releasing
the serial interface lines.
Serial Interface Read/Write Examples
Write to one control register
↓
Start signal
↓
Slave Address byte (R/W bit = LOW)
↓
Base Address byte
↓
Data byte to base address
↓
Stop signal
Write to four consecutive control registers
↓
Start signal
↓
Slave Address byte (R/W bit = LOW)
↓
Base Address byte
↓
Data byte to base address
↓
Data byte to (base address + 1)
↓
Data byte to (base address + 2)
↓
Data byte to (base address + 3)
↓
Stop signal
Read from one control register
↓
Start signal
↓
Slave Address byte (R/W bit = LOW)
↓
Base Address byte
Figure 2. Serial Port Read/Write Timing
Figure 3. Serial Interface – Start/Stop Signal
SDA
t
BUFF
t
STAH
t
DHO
t
DAL
t
DSU
t
DAH
t
STASU
t
STOSU
SCL
65-2072-03
STOP
SDA
SCL
START
STOP START
65-2072-04
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