參數資料
型號: TEA5764HN
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: FM radio + RDS
中文描述: FM, AUDIO SINGLE CHIP RECEIVER, PQCC40
封裝: 6 X 6 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-618-1, HVQFN-40
文件頁數: 31/64頁
文件大小: 287K
代理商: TEA5764HN
TEA5764HN_2
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 9 August 2005
31 of 64
Philips Semiconductors
TEA5764HN
FM radio + RDS
10.6 Error detection and reporting
The TDA5764HN must report information on the number of errors corrected in the last and
previously decoded blocks. This is reported in bits ELB and EPB as shown in
Table 29
.
During synchronization search the error correction is disabled for detection of the first
block and is enabled for processing of the second block according to the mode set by the
SYM bits as described in
Table 36
.
10.7 RDS test modes
In Test mode the raw RDS clock and RDS data can be recovered directly from pins VAFL
and VAFR when bit RDSCDA = 1.
10.8 Reading RDS data from the registers
To read RDS data the microprocessor must read byte12R to byte19R. All 8 bytes must be
read to reset the status bytes 12R and 13R, i.e. effectively the status bits can be updated
by the decoder after reading the last bit of byte19R. Bit DOVF is cleared after reading the
last bit of byte19R and the status of bit SYNC does not depend on reading the register, bit
SYNC indicates if the decoder is synchronized or not. When starting a read action from
byte12R, the decoder blocks updates from the RDS bytes until byte19R has been read.
RDS byte12R to byte19R must be read in one read action.
11. I
2
C-bus interface
The I
2
C-bus interface is based on “The I
2
C-bus specification” version 2.1 January 2000,
expanded by the following definitions.
11.1 Write and read mode
When writing all bytes, byte0W to byte10W can be written with one write action.
Table 8:
S
START
I
2
C-bus FM write mode
Byte 1
chip address
0010 000
As
Byte 2
As
ACK
Byte n
.....
As
ACK
Byte 8
byte6W
xxxx xxxx
As
ACK
P
STOP
R/W ACK byte0W
0
xxxx xxxx
Table 9:
S
START
I
2
C-bus RDS write mode
Byte 1
chip address
As
Byte 2
Am
ACK
Byte n
.....
As
ACK
Byte 8
byte10W
As
non
ACK
P
STOP
R/W ACK byte7W
0010 001
0
xxxx xxxx
xxxx xxxx
Table 10:
S
START
I
2
C-bus FM read mode
Byte 1
chip address
As
Byte 2
Am
ACK
Byte n
.....
Am
ACK
Byte 17
byte15R
NAm
non
ACK
P
STOP
R/W ACK byte0R
0010 000
1
xxxx xxxx
xxxx xxxx
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