參數(shù)資料
型號: TEA5764HN
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: FM radio + RDS
中文描述: FM, AUDIO SINGLE CHIP RECEIVER, PQCC40
封裝: 6 X 6 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-618-1, HVQFN-40
文件頁數(shù): 29/64頁
文件大小: 287K
代理商: TEA5764HN
TEA5764HN_2
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 9 August 2005
29 of 64
Philips Semiconductors
TEA5764HN
FM radio + RDS
10.4.2
Data overflow
During synchronization, after RDS data is read from the registers, new available blocks
are shifted to the registers as described in
Section 10.1
to
Section 10.3
. If the registers
are not read in time, the decoder cannot shift any new available block to the registers and
hence a data overflow will occur, this is indicated by bit DOVF which is set to 1. Bit DOVF
is reset by a read of the registers or if bit NWSY = 1 which results in the start of a new
synchronization search.
Each time when a RDS data block is decoded, bit DAVN goes to logic 0 to indicate the
presence of a new data block. Bit DAVN also triggers the interrupt output INTX. In
principle the microprocessor must now start reading and must have read all RDS data
(byte12R to byte19R) before the arrival of a new RDS data block. In the application it is
possible that there is too large a delay between the arrival of a new block and reading this
block. This can have various causes such as a microprocessor that has to start-up from
Sleep mode or when polling is used instead of interrupt based read actions.
Figure 13
shows the behavior of bit DAVFLG and bit DAVN when polling, where reading can occur at
any time. Note: Bit DAVN sets the INTX oneshot generator when DAVMSK = 1. Unlike
INTX, bit DAVN is not cleared by a read of the mask register.
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