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參數(shù)資料
| 型號： | TEA5764HN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 接收器 |
| 英文描述： | FM radio + RDS |
| 中文描述： | FM, AUDIO SINGLE CHIP RECEIVER, PQCC40 |
| 封裝： | 6 X 6 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-618-1, HVQFN-40 |
| 文件頁數(shù)： | 10/64頁 |
| 文件大?。?/td> | 287K |
| 代理商： | TEA5764HN |
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TEA5764HN_2
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 9 August 2005
10 of 64
Philips Semiconductors
TEA5764HN
FM radio + RDS
8.15 Signal dependent mono/stereo blend (stereo noise cancellation)
If the RF input level decreases, the MPX decoder blends from stereo to mono to limit the
output noise. The continuous mono-to-stereo blend can also be programmed via the
I
2
C-bus to an RF level dependent switched mono-to-stereo transition. Stereo noise
cancellation can be switched off via the I
2
C-bus by bit SNC.
8.16 Software programmable port
One software programmable port (CMOS output) can be addressed via the I
2
C-bus:
Bit SWPM = 1, the software port functions as the output for the FRRFLAG.
Bit SWPM = 0, the software port outputs bit SWP of the registers.
In Test mode the software port outputs signals according to
Table 27
. Test mode is
selected, setting bit TM of byte TESTMODE to logic 1.
The software port cannot be disabled by the PUPD bits; see
Section 8.17
.
8.17 Standby mode
The radio can be put into Standby mode by the Power-Up / Power-Down (PUPD) bits. The
RDS part can be turned off separately or both the RDS and the FM part can be turned off.
The TEA5764HN is still accessible via the I
2
C-bus but takes only a low power from the
supply, in Standby mode, the audio outputs are hard-muted.
8.18 Power-on reset
After startup of V
CCA
and V
CCD
a power-on reset circuit will generate a reset pulse and the
registers will be set to their default values. The power-on reset is effectively generated by
V
CCD
.
After a power-on reset the TEA5764HN is in Standby mode and the PUPD bits are set to
logic 0. After a power-on reset the registers are reset to their default value, except for
byte12R to byte19R and flags DAVFLG, LSYNCFLG and PDFLAG. To reset these, the
RDS part must be turned on by setting PUPD. After setting PUPD to logic 1, it will take
0.9 ms to start-up the TEA5764HN and set these registers to their default value.
The power supplies can be switched on in any order.
When the supply voltage V
CCA
and V
CCD
are at 0 V, all I/Os, the audio outputs and the
reference clock input are high-ohmic.
8.19 RDS/RBDS
8.19.1
RDS/RBDS demodulator
A fully integrated RDS/RBDS demodulator which uses the reference frequency
(32.678 Hz) of the PLL synthesizer tuning system. The RDS demodulator recovers and
regenerates the continuously transmitted RDS or RBDS data stream of the multiplex
signal (MPXRDS) and provides the signals clock (RDCL), data (RDDA) for further
processing by the integrated RDS decoder.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TEA5764HN2GE | 制造商:STMicroelectronics 功能描述: |
| TEA5764UK | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:FM radio + RDS |
| TEA5764UK/N2,027 | 功能描述:調(diào)諧器 FM RADIO WITH RDS RoHS:否 制造商:NXP Semiconductors 功能: 噪聲系數(shù): 工作電源電壓: 最小工作溫度: 最大工作溫度: |
| TEA5764UK-G | 功能描述:調(diào)諧器 FM RADIO WITH RDS RoHS:否 制造商:NXP Semiconductors 功能: 噪聲系數(shù): 工作電源電壓: 最小工作溫度: 最大工作溫度: |
| TEA5766UK/N1,023 | 功能描述:調(diào)節(jié)器/解調(diào)器 FM RADIO + RDS RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
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