參數(shù)資料
型號: TEA5764HN
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: FM radio + RDS
中文描述: FM, AUDIO SINGLE CHIP RECEIVER, PQCC40
封裝: 6 X 6 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-618-1, HVQFN-40
文件頁數(shù): 18/64頁
文件大小: 287K
代理商: TEA5764HN
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T
P
R
1
P
T
F
(1) Interrupt events that occur outside of the region A-B set their respective flag bits in the normal way immediately and can thus trigger a hardware interrupt if the mask
bits are set.
(2) The blocking of interrupts is marked by the region A-B
1
/ B
2
depending on the actual read cycle.
B
1
is when only the INTFLAG is read and a stop condition is received (only INTFLAG is read so only this will be cleared).
B
2
is when both registers are read and hence cleared and this is terminated by either an acknowledge or stop bit.
(3) Interrupt events that occur between A and B set their respective flags after the mask bits are cleared. Which means that in this diagram an interrupt event occurred in
period A-B, so after A-B the flag goes to logic 1.
(4) All interrupt mask bits are cleared after the interrupt flag and mask bytes are read.
(5) Software writes to the mask byte and enables the required mask bits. Any flags currently set will then trigger a hardware interrupt.
(6) INTX is set HIGH (inactive) after the interrupt mask bytes are read.
Fig 6.
I
2
C-bus interrupt sequence, read and write operation
001aab464
device
address
INTFLAG
INTMSK
read access
data
INTMSK
FRQSETMSB
FRQSETLSB
write access
S
R
A
interrupt event
interrupt flag bit
0R data
A
A
(1)
(2)
(3)
interrupt mask bit
(4)
(5)
(6)
(5)
B
1
B
2
1R data
A
data
A
device
address
S
P
W
A
0W data
A
1W data
A
2W data
A
INTX
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