參數(shù)資料
型號(hào)： TE28F004B3T90
廠商： INTEL CORP
元件分類： DRAM
英文描述： 3 Volt Advanced Boot Block Flash Memory
中文描述： 512K X 8 FLASH 3V PROM, 90 ns, PDSO40
封裝： 10 X 20 MM, TSOP-40
文件頁數(shù)： 22/58頁
文件大?。?/td> 920K
代理商： TE28F004B3T90
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
16
3UHOLPLQDU\
3.5.1
Active Power
With CE# at a logic
-
low level and RP# at a logic
-
high level, the device is in the active mode. Refer
to the DC Characteristic tables for I
CC
current values. Active power is the largest contributor to
overall system power consumption. Minimizing the active current could have a profound effect on
system power consumption, especially for battery
-
operated devices.
3.5.2
Automatic Power Savings (APS)
Automatic Power Savings provides low
-
power operation during read mode. After data is read from
the memory array and the address lines are quiescent, APS circuitry places the device in a mode
where typical current is comparable to I
CCS
. The flash stays in this static state with outputs valid
until a new location is read.
3.5.3
Standby Power
With CE# at a logic
-
high level (V
IH
) and device in read mode, the flash memory is in standby
mode, which disables much of the device’s circuitry and substantially reduces power consumption.
Outputs are placed in a high
-
impedance state independent of the status of the OE# signal. If CE#
transitions to a logic
-
high level during erase or program operations, the device will continue to
perform the operation and consume corresponding active power until the operation is completed.
System engineers should analyze the breakdown of standby time versus active time and quantify
the respective power consumption in each mode for their specific application. This will provide a
more accurate measure of application
-
specific power and energy requirements.
3.5.4
Deep Power-Down Mode
The deep power-down mode is activated when RP# = V
IL
(GND
±
0.2 V). During read modes,
RP# going low de-selects the memory and places the outputs in a high impedance state. Recovery
from deep power-down requires a minimum time of t
PHQV
(see
AC Characteristics—Read
Operations,
Section 4.5
).
During program or erase modes, RP# transitioning low will abort the in-progress operation. The
memory contents of the address being programmed or the block being erased are no longer valid as
the data integrity has been compromised by the abort. During deep power-down, all internal
circuits are switched to a low power savings mode (RP# transitioning to V
IL
or turning off power to
the device clears the status register).
3.6
Power-Up/Down Operation
The device is protected against accidental block erasure or programming during power transitions.
Power supply sequencing is not required, since
the device is indifferent as to which power supply,
V
PP
or V
CC
, powers-up first.
相關(guān)PDF資料
PDF描述
TE28F640B3TC100 3 Volt Advanced Boot Block Flash Memory
TE28F320B3TC70 3 Volt Advanced Boot Block Flash Memory
TE28F640B3TC90 3 Volt Advanced Boot Block Flash Memory
TE28F320B3TC90 3 Volt Advanced Boot Block Flash Memory
TE28F004SC-100 BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
相關(guān)代理商/技術(shù)參數(shù)
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TE28F004BET120 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
TE28F004BVB80 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
TE28F004BVT80 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
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