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參數(shù)資料
| 型號： | TE28F004B3T90 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | 3 Volt Advanced Boot Block Flash Memory |
| 中文描述： | 512K X 8 FLASH 3V PROM, 90 ns, PDSO40 |
| 封裝： | 10 X 20 MM, TSOP-40 |
| 文件頁數(shù)： | 17/58頁 |
| 文件大?。?/td> | 920K |
| 代理商： | TE28F004B3T90 |
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28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
3UHOLPLQDU\
11
3.2.2
Read Identifier
To read the manufacturer and device codes, the device must be in read identifier mode, which can
be reached by writing the Read Identifier command (90H). Once in read identifier mode, A
0
= 0
outputs the manufacturer’s identification code and A
0
= 1 outputs the device identifier (see
Table 5
) Note: A
1
–A
21
= 0. To return to read array mode, write the Read Array command (FFH).
3.2.3
Read Status Register
The device status register indicates when a program or erase operation is complete and the success
or failure of that operation. To read the status register issue the Read Status Register (70H)
command to the CUI. This causes all subsequent read operations to output data from the status
register until another command is written to the CUI. To return to reading from the array, issue the
Read Array (FFH) command.
The status register bits are output on DQ
0
–DQ
7
. The upper byte, DQ
8
–DQ
15
, outputs 00H during a
Read Status Register command.
The contents of the status register are latched on the falling edge of OE# or CE#. This prevents
possible bus errors which might occur if status register contents change while being read. CE# or
OE# must be toggled with each subsequent status read, or the status register will not indicate
completion of a program or erase operation.
When the WSM is active, SR.7 will indicate the status of the WSM; the remaining bits in the status
register indicate whether or not the WSM was successful in performing the desired operation (see
Table 7 on page 14
).
3.2.3.1
Clearing the Status Register
The WSM sets status bits 1 through 7 to “1,” and clears bits 2, 6 and 7 to “0,” but cannot clear
status bits 1 or 3 through 5 to “0.” Because bits 1, 3, 4 and 5 indicate various error conditions, these
bits can only be cleared through the Clear Status Register (50H) command. By allowing the system
software to control the resetting of these bits, several operations may be performed (such as
cumulatively programming several addresses or erasing multiple blocks in sequence) before
Table 5. Read Identifier Table
Size
Mfr. ID
Device Identifier
-T
(Top Boot)
-B
(Bottom Boot)
28F004B3
0089H
D4H
D5H
28F400B3
8894H
8895H
28F008B3
0089H
D2H
D3H
28F800B3
8892H
8893H
28F016B3
D0H
D1H
28F160B3
0089H
8890H
8891H
28F320B3
8896H
8897H
28F640B3
8898H
8899H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TE28F640B3TC100 | 3 Volt Advanced Boot Block Flash Memory |
| TE28F320B3TC70 | 3 Volt Advanced Boot Block Flash Memory |
| TE28F640B3TC90 | 3 Volt Advanced Boot Block Flash Memory |
| TE28F320B3TC90 | 3 Volt Advanced Boot Block Flash Memory |
| TE28F004SC-100 | BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TE28F004B5B80 | 制造商:Intel 功能描述: |
| TE28F004BEB120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TE28F004BET120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TE28F004BVB80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| TE28F004BVT80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
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