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參數(shù)資料
| 型號(hào)： | T7688 |
| 廠商： | Lineage Power |
| 英文描述： | 5.0 V E1/CEPT Quad Line Interface(5.0 V E1/CEPT四線接口) |
| 中文描述： | 5.0V的E1/CEPT四線接口（5.0V的E1/CEPT四線接口） |
| 文件頁數(shù)： | 14/38頁 |
| 文件大小： | 577K |
| 代理商： | T7688 |
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Data Sheet
May 1998
T7688 5.0 V E1/CEPT Quad Line Interface
14
Lucent Technologies Inc.
Transmitter
(continued)
Transmitter Configuration Modes
Zero Substitution Encoding/Decoding (CODE)
Zero substitution encoding/decoding (HDB3) can be
activated only in the single-rail system interface mode
(DUAL = 0) by setting CODE = 1 (register 5, bit 3).
Data received from the line interface on RTIP and
RRING will be HDB3 decoded before appearing on
RDATA (pins 14, 38, 64, 88) at the system interface.
Likewise, data transmitted from the system interface on
TDATA (pins 17, 35, 67, 85) will be HDB3 encoded
before appearing on TTIP and TRING at the line inter-
face. This mode also allows coding violations, such as
receiving two consecutive 1s of the same polarity from
the line interface, to be output on BPV (pins 13, 39, 63,
89).
All Ones (AIS, Blue Signal) Generator (TBS)
When the transmit blue signal control is set (TBS = 1)
for a given channel (registers 6 to 9, bit 2), a continu-
ous stream of bipolar 1s is transmitted to the line inter-
face (AIS). The TPD/TDATA and TND inputs are
ignored during this mode. The TBS input is ignored
when a remote loopback (RLOOP) is selected using
loopback control bits LOOPA and LOOPB (registers 6
to 9, bits 3 and 4). (See the Loopbacks section.)
To maintain application flexibility, the clock source used
for the blue signal is selected by configuring BCLK
(pin 30). If a data rate clock is input on the BCLK pin, it
will be used to transmit the blue signal. If BCLK = 0,
then TCLK is used to transmit the blue signal (the
smoothed clock from the jitter attenuator is used if
JAT = 1 is selected). If BCLK = 1, then XCLK (after
being divided by a factor of 16) is used to transmit the
blue signal. After BCLK is established, a minimum of
16
μ
s is required for the device to properly select the
clock. For any of the above options, the clock tolerance
must meet the normal line transmission rate
(2.048 MHz
±
50 ppm).
Transmitter Alarms
Loss of Transmit Clock (LOTC) Alarm
A loss of transmit clock alarm (LOTC = 1) is indicated if
any of the clocks in the transmit path disappear (regis-
ters 0 and 1, bits 3 and 7). This includes loss of TCLK
input, loss of RCLK during remote loopback, loss of jit-
ter attenuator output clock (when enabled), or the loss
of clock from the pulse-width controller.
For all of these conditions, a core transmitter timing
clock is lost and no data can be driven onto the line.
Output drivers TTIP and TRING are placed in a high-
impedance state when this alarm condition is active.
The LOTC interrupt is asserted between 3
μ
s and
16
μ
s after the clock disappears, and deasserts imme-
diately after detecting the first clock edge.
Transmit Driver Monitor (TDM) Alarm
The transmit driver monitor detects two conditions: a
nonfunctional link due to faults on the primary of the
transmit transformer, and periods of no data transmis-
sion. The TDM alarm (registers 0 and 1, bits 2 and 6) is
the ORed function of both faults and provides informa-
tion about the integrity of the transmit signal path.
The first monitoring function is provided to detect non-
functional links and protect the device from damage.
The alarm is set (TDM = 1) when one of the transmit-
ter's line drivers (TTIP or TRING) is shorted to power
supply or ground, or TTIP and TRING are shorted
together. Under these conditions, internal circuitry pro-
tects the device from damage and excessive power
supply current consumption by 3-stating the output
drivers. The monitor detects faults on the transformer
primary, but transformer secondary faults may not be
detected. The monitor operates by comparing the line
pulses with the transmit inputs as in a bit error detect
mode. After 32 transmit clock cycles, the transmitter is
powered up in its normal operating mode. The drivers
attempt to correctly transmit the next data bit. If the
error persists, TDM remains active to eliminate alarm
chatter and the transmitter is internally protected for
another 32 transmit clock cycles. This process is
repeated until the error condition is removed and the
TDM alarm is deactivated.
The second monitoring function is to indicate periods of
no data transmission. The alarm is set (TDM = 1) when
32 consecutive zeros have been transmitted and is
cleared on the detection of a single pulse. This alarm
condition does not alter the state or functionality of the
signal path.
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