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參數(shù)資料
| 型號： | SI3012-KS |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 15/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LINE-SIDE DAA 16SOIC |
| 標準包裝： | 48 |
| 系列： | ISOcap™ |
| 數(shù)據格式： | V.90 |
| 電源電壓： | 3.3 V ~ 5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-SOIC N |
| 包裝： | 管件 |
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Si3038
22
Rev. 2.01
Initialization
When the Si3038 is initially powered up, the RESET pin
should be asserted. When the RESET pin is
deasserted, the registers will have default values. This
reset condition guarantees the line-side chip (Si3014) is
powered down with no possibility of loading the line (i.e.,
off-hook). An example initialization procedure is outlined
below:
1. Execute a register reset by writing (any value) to register
3Ch.
2. Program the desired sample rate with register 40h (42h).
See register 40h (42h) description on page 41 for
allowable sample rates.
3. Write 0x0000 to register 3Eh to power up the Si3038.
4. Wait for the Si3038 to complete power up. The lower 8 bits
indicate that the Si3038 is ready. If the Si3038 is
configured as line #1 codec, 3Eh[7:0] = 0x0F indicates
readiness. If the codec is configured as line #2,
3Eh[7:0] = 0x33 indicates readiness.
5. Program GPIO registers to desired modes (registers 4Ch–
54h).
6. Program DAC/ADC levels with register 46h (48h).
7. Program desired line interface parameters (i.e., DCT[1:0],
ACT, OHS, RT LIM[1:0], and Vol[1:0] as defined in
After this procedure is complete, the Si3038 is ready for
ring detection and off-hook operation.
AC-Link
AC-link is a bidirectional, fixed rate, serial PCM digital
stream. It handles multiple input and output audio
streams and control register accesses employing a
time-division multiplexing (TDM) scheme. The AC-link
architecture divides each audio frame into 12 outgoing
and 12 incoming data streams, each with 20-bit sample
resolution.
The AC-link serial interconnect defines a digital data
and control pipe between the controller and the codec.
The AC-link supports 12 20-bit slots at 48 kHz on
SDATA_IN and SDATA_OUT. The TDM “slot-based”
architecture supports a per-slot valid tag infrastructure
that is the source of each slot’s data sets or clears to
indicate the validity of the slot data within the current
frame. For modem AFE, data streams at a variety of
required sample rates can be supported.
Isolation Barrier
The Si3038 achieves an isolation barrier through low-
cost, high-voltage capacitors in conjunction with Silicon
Laboratories’ patented ISOcap signal processing
techniques. These techniques eliminate any signal
degradation due to capacitor mismatches, common
Slovakia
0
10
0
00
Slovenia
0
10
1
00
South Africa
1
0
10
1
0
00
South Korea
0
10
0
00
Spain
0
0 or 1
11
0
11
00
Sweden
0
0 or 1
11
0
11
00
Switzerland
0
0 or 1
11
0
11
00
Syria1
00
01
00
Taiwan1
00
01
00
Thailand1
00
01
00
UAE
0
0100
0
00
United Kingdom
0
0 or 1
11
0
11
00
USA
0
0100
0
00
Yemen
0
0100
0
00
Table 19. Country Specific Register Settings (Continued)
Register
5Ch
62h
Country
OHS
ACT
DCT[1:0]
RZ
RT
LIM[1:0] VOL[1:0]
Note:
1. See "DC Termination Considerations" on page 24 for more information.
2. CTR21 includes the following countries: Austria, Belgium, Denmark, Finland, France, Germany, Greece,
Iceland, Ireland, Italy, Luxembourg, Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and the
United Kingdom.
3. Supported for loop current
≥ 20 mA.
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| SI3019-F-FS | IC LINE-SIDE DAA 16SOIC |
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| SI3063-F-FS | IC DAA ENH GLOB LINE-SIDE 16SOIC |
| SI3066-B-FS | IC DAA ENH FCC LINE-SIDE 8SOIC |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SI3012-KSR | 制造商:Silicon Laboratories Inc 功能描述: |
| SI-3012KS-TL | 制造商:Sanken Electric Co Ltd 功能描述:IC REG LDO ADJ 1A 8SOIC |
| SI3012-KT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL MC 97 SILICON DAA |
| SI-3012LU | 制造商:SANKEN 制造商全稱:Sanken electric 功能描述:Surface-Mount, Low Current Consumption, Low Dropout Voltage Dropper Type |
| SI-3012LU-TL | 制造商:Sanken Electric Co Ltd 功能描述:IC REG LDO ADJ 0.25A SOT89-5 |
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