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參數(shù)資料
| 型號： | S29GL128M90FAIR20 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | MOSFET, Switching; VDSS (V): -30; ID (A): -14; Pch : 2.5; RDS (ON) typ. (ohm) @10V: 0.009; RDS (ON) typ. (ohm) @4V[4.5V]: [0.015]; RDS (ON) typ. (ohm) @2.5V: -; Ciss (pF) typ: 3500; toff (µs) typ: 0.31; Package: SOP-8 |
| 中文描述： | 8M X 16 FLASH 3V PROM, 90 ns, PBGA64 |
| 封裝： | 13 X 11 MM, FORTIFIED, BGA-64 |
| 文件頁數(shù)： | 103/160頁 |
| 文件大?。?/td> | 2142K |
| 代理商： | S29GL128M90FAIR20 |
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April 30, 2004 S29GLxxxM_00A5
S29GLxxxM MirrorBit
TM
Flash Family
103
P r e l i m i n a r y
Autoselect Command Sequence
The autoselect command sequence allows the host system to read several iden-
tifier codes at specific addresses:
Note:
The device ID is read over three cycles. SA = Sector Address
The autoselect command sequence is initiated by first writing two unlock cycles.
This is followed by a third write cycle that contains the autoselect command. The
device then enters the autoselect mode. The system may read at any address any
number of times without initiating another autoselect command sequence:
The system must write the reset command to return to the read mode (or erase-
suspend-read mode if the device was previously in Erase Suspend).
Enter SecSi Sector/Exit SecSi Sector Command Sequence
The SecSi Sector region provides a secured data area containing an 8-word/16-
byte random Electronic Serial Number (ESN). The system can access the SecSi
Sector region by issuing the three-cycle Enter SecSi Sector command sequence.
The device continues to access the SecSi Sector region until the system issues
the four-cycle Exit SecSi Sector command sequence. The Exit SecSi Sector com-
mand sequence returns the device to normal operation. Table
31
and Table
32
show the address and data requirements for both command sequences. See also
“SecSi (Secured Silicon) Sector Flash Memory Region” for further information.
Note that the ACC function and unlock bypass modes are not available when the
SecSi Sector is enabled.
Word Program Command Sequence
Programming is a four-bus-cycle operation. The program command sequence is
initiated by writing two unlock write cycles, followed by the program set-up com-
mand. The program address and data are written next, which in turn initiate the
Embedded Program algorithm. The system is not required to provide further con-
trols or timings. The device automatically provides internally generated program
pulses and verifies the programmed cell margin. Tables 31 and 32 show the ad-
dress and data requirements for the word program command sequence,
respectively.
When the Embedded Program algorithm is complete, the device then returns to
the read mode and addresses are no longer latched. The system can determine
the status of the program operation by using DQ7 or DQ6. Refer to the Write Op-
eration Status section for information on these status bits. Any commands
written to the device during the Embedded Program Algorithm are ignored.
Note
that the SecSi Sector, autoselect, and CFI functions are unavailable when a pro-
gram operation is in progress.
Note that a
hardware reset
immediately
terminates the program operation. The program command sequence should be
Identifier Code
A7:A0
(x16)
A6:A-1
(x8)
Manufacturer ID
00h
00h
Device ID, Cycle 1
01h
02h
Device ID, Cycle 2
0Eh
1Ch
Device ID, Cycle 3
0Fh
1Eh
SecSi Sector Factory Protect
03h
06h
Sector Protect Verify
(SA)02h
(SA)04h
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PDF描述 |
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| S29GL128M90FAIR22 | 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology |
| S29GL128M90FAIR23 | MOSFET, Switching; VDSS (V): -60; ID (A): -5; Pch : 2.0/3.0; RDS (ON) typ. (ohm) @10V: 0.06; RDS (ON) typ. (ohm) @4V[4.5V]: [0.09]; RDS (ON) typ. (ohm) @2.5V: -; Ciss (pF) typ: 1350; toff (µs) typ: 0.055; Package: SOP-8 |
| S29GL128M90FAIR80 | MOSFET, Switching; VDSS (V): -60; ID (A): -5; Pch : 2.0/3.0; RDS (ON) typ. (ohm) @10V: 0.06; RDS (ON) typ. (ohm) @4V[4.5V]: [0.09]; RDS (ON) typ. (ohm) @2.5V: -; Ciss (pF) typ: 1350; toff (µs) typ: 0.055; Package: SOP-8 |
| S29GL128M90FAIR82 | 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology |
| S29GL128M90FAIR83 | 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL128M90TAIR10 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 128M-Bit 16M x 8/8M x 16 90ns 56-Pin TSOP Tray |
| S29GL128M90TAIR13 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 128MBIT 16MX8/8MX16 90NS 56TSOP - Tape and Reel |
| S29GL128M90TFIR10 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 128M-Bit 16M x 8/8M x 16 90ns 56-Pin TSOP Tray |
| S29GL128N10FFI010 | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 128Mbit 16M/8M x 8bit/16bit 100ns 64-Pin Fortified BGA Tray 制造商:Spansion 功能描述:MIRRORBIT FLASH 128MB SMD 29LV128 |
| S29GL128N10FFI020 | 制造商:Spansion 功能描述:Flash - NOR IC |
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