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參數(shù)資料
| 型號： | S1C62920D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC63 |
| 封裝： | DIE-63 |
| 文件頁數(shù)： | 33/78頁 |
| 文件大?。?/td> | 874K |
| 代理商： | S1C62920D |
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S1C62920 TECHNICAL MANUAL
EPSON
31
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver)
4.7.6 Control of LCD driver
Table 4.7.6.1 shows the LCD driver's control bits and their addresses. Figure 4.7.6.1 shows the display
memory map.
Table 4.7.6.1 LCD driver control bits
Address
Comment
Register
D3
D2
D1
D0
Name
Init
1
0
*1
LPWR
R
0
LOFF
LPWR
–
0
All off
On
Normal
Off
LOFF
0
C1H
*2
*5
*7
Unused
LCD display control
LCD power supply On/Off
R/W
*1 Initial value at the time of initial reset
*5 Constantly "0" when being read
*2 Not set in the circuit
*6 Refer to main manual
*3 Undefined
*7 Page switching in I/O memory is not necessary
*4 Reset (0) immediately after being read
Address
Page
High
Low
01
234
567
8
9
A
B
C
D
E
F
6
7
1
Display memory (32 words x 4 bits) W
Fig. 4.7.6.1 Display memory map
LPWR: LCD power supply ON/OFF (C1HD0)
Controls the LCD power ON and OFF
When "1" is written:
Power ON
When "0" is written:
Power OFF
Reading:
Valid
By writing "1" to LPWR, the LCD power goes ON.
When "0" is written, the LCD power goes OFF and all terminals of the COM output and SEG output
become VC2 level.
This control does not affect to SEG terminals that have been set for DC output.
At initial reset, this register is set to "0".
LOFF: LCD display control (C1HD1)
Controls the LCD display
When "1" is written:
Display all OFF
When "0" is written:
Display ON
Reading:
Valid
When "1" is written to LOFF, all LCD dots will fade out; writing "0" will set it back to normal.
All fading out of LCD at LOFF = "1" is due to light out signals and does not affect the content of the
segment data memory.
Flashing on the entire LCD panel is performed by this function.
At initial reset, this register is set to "0".
4.7.7 Programming notes
(1) The contents of the display memory are undefined until the area is initialized (through, for instance,
memory clear processing by the CPU). Initialize the display memory by executing initial processing.
(2) Since the display memory area is write-only, display data cannot be rewritten by arithmetic operations
(such as AND, OR, ADD, SUB).
(3) 100 msec or more time is necessary for stabilizing the LCD drive voltages VC1 and VC3 after setting the
LCD power control register LPWR to "1". Be careful of the segment-on right after the power is turned
on.
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