參數(shù)資料
型號(hào)： RH8053GC029512
英文描述： Microprocessor
中文描述： 微處理器
文件頁(yè)數(shù)： 25/81頁(yè)
文件大?。?/td> 598K
代理商： RH8053GC029512
Mobile Intel
Celeron Processor (0.18μ) in BGA2 and Micro-PGA2 Packages
Order Number#249563-001
Datasheet
25
2.
Static voltage regulation includes: DC output initial voltage set point adjust, output ripple and noise, output
load ranges specified in Table 9 above, temperature, and warm up.
I
CCT
is the current supply for the system bus buffers, including the on-die termination.
I
CCx,max
specifications are specified at V
CC,DC max
, V
CCT,max
, and 100°C and under maximum signal
loading conditions.
Based on simulations and averaged over the duration of any change in current. Use to compute the
maximum inductance and reaction time of the voltage regulator. This parameter is not tested.
Maximum values specified by design/characterization at nominal V
CC
and V
CCT
.
V
CCx
must be within this range under all operating conditions, including maximum current transients. V
CCx
must return to within the static voltage specification, V
CCx,DC
, within 100
μ
s after a transient event. The
average of V
CCx
over time must not exceed 1.65V, as an arbitrarily large time span may be used for this
average.
Voltages are measured at the processor package pin for the Micro-PGA2 part and at the package ball on
the BGA2 part.
3.
4.
5.
6.
7.
8.
The signals on the mobile Intel Celeron processor system bus are included in the GTL+ signal
group. These signals are specified to be terminated to V
CCT
. The DC specifications for these
signals are listed in Table 10 and the termination and reference voltage specifications for these
signals are listed in Table 11. The mobile Intel Celeron processor requires external termination
and a V
REF
. Refer to the
Mobile Pentium
III
Processor GTL+ System Bus Layout Guideline
for
full details of system V
CCT
and V
REF
requirements. The CMOS, Open-drain, and TAP signals are
designed to interface at 1.5V levels to allow connection to other devices. BCLK and PICCLK are
designed to receive a 2.5-V clock signal. The DC specifications for these signals are listed Table
12.
Table 10. GTL+ Signal Group DC Specifications
T
J
= 0°C to 100°C; V
CC
= 1.10V ±80 mV or 1.35V ±100 mV or 1.60V ±115 mV; V
CCT
= 1.50V ±115 mV
Symbol
Parameter
Min
Max
Unit Notes
V
OH
Output High Voltage
—
—
V
See V
CCT,max
in Table 11
R
ON
Output Low Drive Strength
16.67
I
L
Leakage Current for Inputs, Outputs and I/Os
±100
μ
A
Note 1
NOTE:
(0
≤
V
IN/OUT
≤
V
CCT
).
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