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參數(shù)資料
| 型號： | OX16C954-TQC60-B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface |
| 中文描述： | UART的高性能四路128字節(jié)的FIFO英特爾/摩托羅拉總線接口 |
| 文件頁數(shù)： | 16/54頁 |
| 文件大小： | 529K |
| 代理商： | OX16C954-TQC60-B |
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Data Sheet Revision 1.0
Page 16
OX16C954 rev B
OXFORD SEMICONDUCTOR LTD.
5 M
ODE
S
ELECTION
The OX16C954 device is a four-channel device backward compatible with the 16C454, 16C554, 16C654 and 16C750 UARTs.
Each of the four channels are identical and independent in terms of functionality, with the exception of some shared pins (for
example, CLKSEL, FIFOSEL# CLK and RESET). The remainder of this document therefore discusses the operation of a single
channel only.
The operation of each Uart Channel depends on a number of mode settings, which are referred to throughout this section. The
modes, conditions and corresponding FIFO depth are tabulated below:
UART Mode
FIFO
size
(EFR[4]=1)
450
1
0
X
550
16
1
0
Extended 550
128
1
0
650
128
1
1
750
128
1
0
950
1
128
1
1
FCR[0]
Enhanced mode
FCR[5]
(guarded with LCR[7] = 1)
X
0
X
X
1
X
FIFOSEL#
Pin
X
1
0
X
1
X
Table 3: UART Mode Configuration
Note 1: 950 mode configuration is identical to 650 configuration
5.1
After a hardware reset, bit 0 of the FIFO Control Register
(‘FCR’) is cleared, hence the UART is compatible with the
16C450. The transmtter and receiver FIFOs (referred to as
the ‘Transmt Holding Register and ‘Receiver Holding
Register respectively) have a depth of one. This is referred
to as ‘Byte mode’. When FCR[0] is cleared, all other mode
selection parameters are ignored.
450 Mode
5.2
Connect FIFOSEL#to VDD. After a hardware reset, writing
a 1 to FCR[0] will increase the FIFO size to 16, providing
compatibility with 16C550 devices. Since this pin is VDD in
16C554 devices, replacing a 16C554 with OX16C954
would result in a 550 compatible device with 16 byte deep
FIFOs.
550 Mode
5.3
Connect FIFOSEL#to GND. Writing a 1 to FCR[0] will now
increase the FIFO size to 128, thus providing a 550 device
with 128 deep FIFOs.
Extended 550 Mode
5.4
Writing a 1 to FCR[0] will increase the FIFO size to 16. In a
simlar fashion to 16C750, the FIFO size can be further
increased to 128 by writing a 1 to FCR[5]. Note that access
to FCR[5] is protected by LCR[7]. i.e., to set FCR[5],
750 Mode
software should first set LCR[7] to temporarily remove the
guard. Once FCR[5] is set, the software should clear
LCR[7] for normal operation.
The 16C750 additional features are available as long as
the UART is not put into Enhanced mode; i.e. ensure
EFR[4] = ‘0’. These features are:
Deeper FIFOs
Automatic RTS/CTS out-of-band flow control
Sleep mode
5.5
The OX16C954 UART is compatible with the 16C650 when
EFR[4] is set, i.e. the device is in Enhanced mode. As 650
software drivers usually put the device in Enhanced mode,
running 650 drivers on the one of the UART channels will
result in 650 compatibility with 128 deep FIFOs, as long as
FCR[0] is set. Note that the 650 emulation mode of the
OX16C954 provides 128-deep FIFOs whereas the
standard 16C650 has only 32 byte FIFOs.
650 mode has the same enhancements as the 16C750
over the 16C550, but these are enabled using different
registers.
There are also additional enhancements over those of the
16C750 in this mode. These are -
1. Automatic in-band flow control
2. Special character detection
650 Mode
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