- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359234 > MT9046 (Zarlink Semiconductor Inc.) T1/E1 System Synchronizer with Holdover PDF資料下載
參數(shù)資料
| 型號(hào)： | MT9046 |
| 廠商： | Zarlink Semiconductor Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | T1/E1 System Synchronizer with Holdover |
| 中文描述： | T1/E1的系統(tǒng)同步的緩繳暫繳稅 |
| 文件頁數(shù)： | 5/34頁 |
| 文件大?。?/td> | 508K |
| 代理商： | MT9046 |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
MT9046
Data Sheet
5
Zarlink Semiconductor Inc.
Functional Description
The MT9046 is a Multitrunk System Synchronizer with frequency holdover capability, providing timing (clock) and
synchronization (frame) signals to interface circuits for T1 and E1 Primary Rate Digital Transmission links. Figure 1
is a functional block diagram which is described in the following sections.
Reference Select MUX Circuit
The MT9046 accepts two simultaneous reference input signals and operates on their falling edges. Either the
primary reference (PRI) signal or the secondary reference (SEC) signal can be selected as input to the TIE
Corrector Circuit. The selection is based on the Control, Mode and Reference Selection of the device. See Table 1
and Table 4.
Frequency Select MUX Circuit
The MT9046 operates with one of four possible input reference frequencies (8 kHz, 1.544 MHz, 2.048 MHz or
19.44 MHz). The frequency select inputs (FS1 and FS2) determine which of the four frequencies may be used at
the reference inputs (PRI and SEC). Both inputs must have the same frequency applied to them. A reset (RST)
must be performed after every frequency select input change. See Table 1.
Table 1 - Input Frequency Selection
Time Interval Error (TIE) Corrector Circuit
The TIE corrector circuit, when enabled, prevents a step change in phase on the input reference signals (PRI or
SEC) from causing a step change in phase at the input of the DPLL block of Figure 1.
During reference input rearrangement, such as during a switch from the primary reference (PRI) to the secondary
reference (SEC), a step change in phase on the input signals will occur. A phase step at the input of the DPLL
would lead to unacceptable phase changes in the output signal.
45
TDI
Test Serial Data In (Input).
JTAG serial test instructions and data are shifted in on this pin.
This pin is internally pulled up to V
DD
.
Test Reset (Input).
Asynchronously initializes the JTAG TAP controller by putting it in the
Test-Logic-Reset state. If not used, this pin should be held low.
46
TRST
47
TCK
Test Clock (Input):
Provides the clock to the JTAG test logic. This pin is internally pulled up to
V
DD
.
Test Mode Select (Input).
JTAG signal that controls the state transitions of the TAP
controller. This pin is internally pulled up to V
DD
.
48
TMS
FS2
FS1
Input Frequency
0
0
19.44 MHz
0
1
8 kHz
1
0
1.544 MHz
1
1
2.048 MHz
Pin Description (continued)
Pin #
Name
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT9046AN | T1/E1 System Synchronizer with Holdover |
| MT90503 | 2048VC AAL1 SAR |
| MT90503AG | CLIP, STRAIN RELIEF, 50WAY; For use with:820 Series Tripolarized Wiremount Sockets; Ways, No. of:50; Material:Metal; Connector type:Strain Relief RoHS Compliant: Yes |
| MT90520 | 8-Port Primary Rate Circuit Emulation AAL1 SAR |
| MT90520AG | 8-Port Primary Rate Circuit Emulation AAL1 SAR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9046AN | 制造商:Microsemi Corporation 功能描述: |
| MT9046AN1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1 /T1 3.3V 48SSOP - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SYNCHRONIZER T1/E1 48SSOP 制造商:Microsemi Corporation 功能描述:IC SYNCHRONIZER T1/E1 48SSOP |
| MT9046ANR1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1 /T1 3.3V 48SSOP - Tape and Reel 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SYNCHRONIZER T1/E1 48SSOP 制造商:Microsemi Corporation 功能描述:IC SYNCHRONIZER T1/E1 48SSOP |
| MT9048 | 制造商:DBLECTRO 制造商全稱:DB Lectro Inc 功能描述:Standard Type |
| MT90489 | 制造商: 功能描述: 制造商:undefined 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。