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參數(shù)資料
| 型號： | ML53812-2 |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP176 |
| 封裝： | LQFP-176 |
| 文件頁數(shù)： | 45/64頁 |
| 文件大?。?/td> | 668K |
| 代理商： | ML53812-2 |
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1
Oki Semiconductor
ML53812-2
H.100/H.110CT Bus System Interface and Time Slot Interchange
1.0 DESCRIPTION
The ML53812-2 is a complete CT Bus system interface and time slot interchange device that provides a
cost-effective connection between a computer board’s telephony interfaces or signal processing resources
and the CT Bus. The ML53812-2 is an evolution of existing time-slot interchange ICs which offers seam-
less interoperability with SCbus devices.
A key element in computer telephony (CT) equipment is the auxiliary telecom bus. Most manufacturers
of high-capacity CT equipment have used one or more types of telecom buses to transport and switch
low-latency communications traffic between boards within the computer, bypassing the computer’s
main I/O and memory buses. To simplify the integration of devices that incorporate a telecom bus, the
Enterprise Computer Telephony Forum (ECTF) developed a standard bus (H.100/H.110 CT Bus) that
provides compatibility modes with the most prevalent telecom buses today (SCbus and MVIP-90),
as well as the capacity and feature set needed to support the next generation of high capacity CT servers.
The new CT Bus is embraced by Dialogic under the Signal Computing System Architecture (SCSA)
umbrella of open standards for building interoperable CT systems.
The ML53812-2 runs in both 4 MHz and 8 MHz SCbus modes and supports the switching features
needed to integrate CT Bus devices with 4 MHz SCbus, 8 MHz SCbus, and 2 MHz MVIP-90 devices.
Because the H.100/H.110 CT Bus uses an identical switching model and clock speeds to that used for the
SCbus, developers have unparalleled flexibility in integrating these two types of devices, or in transition-
ing from one type to the other.
The ML53812-2 takes full advantage of the mandatory and optional features defined in the ECTF H.100
and H.110 interoperability specifications. It is a non-blocking 512 x 4096 time slot switch, interfacing up
to 512 ports on its parent device to any of the 4096 time slots on the new CT Bus. The high number of local
time slots available makes it easier to design high-density CT hardware, supporting as many as eight net-
work interfaces or 256 voice processing ports per chip.
This powerful chip is offered in an ultra slim profile (176-pin LQFP package, with a 24 mm x 24 mm x 1.4
mm body size) that makes it possible to mount the chip on either side of the board. The chip is fully soft-
ware programmable, and can be controlled by a variety of microprocessors, including Intel and Motorola
in both multiplexed and nonmultiplexed modes.
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