參數(shù)資料
型號(hào)： ML53812-2
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP176
封裝： LQFP-176
文件頁(yè)數(shù)： 24/64頁(yè)
文件大小： 668K
代理商： ML53812-2
s ML53812-2 s ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
26
Oki Semiconductor
Configuration Register Byte 10, AR = 000ah
DR_0
C
Definition
[1:0]
[81:80]
L_SI_[7:4], L_SO_[7:4] Stream Rate [1:0]
[3:2]
[83:82]
L_CLK_1 Frequency [1:0]
4
84
L_CLK_1 Polarity
5
85
L_FS_1 Polarity
[7:6]
[87:86]
L_FS_1 Position [1:0]
L_SI_[7:4], L_SO_[7:4] Stream Rate [1:0] (C_ [81:80]) (Read/Write)
00
→
2.048 Mb/s (L_SI_[7:4], L_SO_[7:4]) (Default)
01
→
4.096 Mb/s (L_SI_[5:4], L_SO_[5:4])
10
→
8.192 Mb/s (L_SI_[4],
L_SO_[4])
11
→
Reserved
L_CLK_1 Frequency [1:0] (C_ [83:82]) (Read/Write) [1]
1.
Note: the L_CLK_1 frequency need not match the L_SI and L_SO stream frequencies, neither need it match the CT_C8 frequency when configured
as slave-to-CT.
00
→
2.048 MHz (Default)
01
→
4.096 MHz
10
→
8.192 MHz
11
→
16.384 MHz
L_CLK_1 Polarity (C_ [84]) (Read/Write)
0
→
L_CLK_1 Non-Inverted (Default)
1
→
L_CLK_1 Inverted
L_FS_1 Polarity (C_ [85]) (Read/Write)
0
→
L_FS_1 Non-Inverted (Default)
1
→
L_FS_1 Inverted
L_FS_1 Position [1:0] (C_ [87:86]) (Read/Write)
00
→
Early - L_FS_1 occurs during the last L_CLK_1 period of the frame (Default)
01
→
Straddle - L_FS_1 straddles the frame boundary
10
→
Late - L_FS_1 occurs during the first L_CLK_1 period of the frame
11
→
Reserved
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