MOTOROLA
3-14
CONFIGURATION AND MODES OF OPERATION
M68HC11
REFERENCE MANUAL
3.5.2 Test-Related Control Bits in the BAUD Register
The following register and paragraphs describe the two test-related control bits in the
SCI baud-rate (BAUD) control register. These bits, which are only accessible in the
special modes, revert to zeros if the mode is changed to a normal mode. Because no
read path is implemented for these two bits, they always read zero, even after they are
written to one in a special mode.
TCLR — Clear Baud-Rate Timing Chain
Can be written only while SMOD equals one. Writing a one to this bit triggers a reset
of the baud-rate counter chain. This bit always reads zero.
RCKB — SCI Baud-Rate Clock Test
Can be written only while SMOD equals one. Writing a one to this bit enables a baud-
rate clock test using the PD1 pin. When this baud-rate test function is enabled, the ex-
clusive OR of the SCI receive clock (16 times the baud rate) and the SCI transmit clock
(one times the baud rate) is driven out the PD1 pin so it can be monitored by factory
test equipment. This bit always reads zero.
The other bits in this register are related to the asynchronous SCI and are described
in
SECTION 9 ASYNCHRONOUS SERIAL COMMUNICATIONS INTERFACE
.
3.5.3 Special Test Mode
The special test mode is primarily intended for Motorola internal production testing;
however, there are a few cases where the user can utilize the test mode. These spe-
cial cases include programming the CONFIG register, programming calibration data
into the EEPROM, and development situations such as emulation and debug. Since
the mode control bits can be written in test mode, it is possible to come out of reset in
special test mode, check the contents of the CONFIG register, and then switch to a
normal operating mode to re-enable the automatic protection mechanisms. This trick
is also useful for a first-time turn-on situation where the contents of the CONFIG reg-
ister might not be known. Except for these few limited cases, the MC68HC11A8
should not be in test mode in a user’s application.
Because the test mode overrides several automatic protection mechanisms or allows
them to be overridden, there are risks associated with these modes of operation. For
example, by default the COP and clock monitor are disabled in special modes. Also in
special modes, the $00 opcode is a legal opcode, which causes the address bus to
become an uninterruptable 16-bit counter (useful for testing but a disaster in a real ap-
plication). Several of the test functions are included in this category. Such risks must
be weighed against whatever benefit is being derived from using special test or boot-
strap operating mode.
One important use of the test mode is to allow programming of the CONFIG register
BAUD —
Testing Functions Control Register
$102B
BIT 7
TCLR
0
6
0
0
5
4
3
2
1
BIT 0
SCR0
0
SCP1
0
SCP0
0
RCKB
0*
SCR2
0
SCR1
0
RESET: